On 12/7/2017 1:52 PM, Alexander Duyck wrote:
The reads/writes themselves should be cheap. These kind of things only get to be really expensive when you start looking at adding delays in between the writes/reads polling on things. As long as we aren't waiting milliseconds on things you can write/read thousands of registers and not even notice it. One thing you might look at doing in order to speed some of this up a bit would be to also combine updating the Tx SA and Rx SA in your clear_hw_tables loop so that you could do them in parallel in your loop instead of having to do them in series. Anyway it is just a thought. If nothing else you might look at timing the function to see how long it actually takes. I suspect it shouldn't be too long since the turnaround time on the PCIe bus should be in microseconds so odds are reading/writing 35K registers might ovinly add a few milliseconds to total reset time.
Good ideas - thanks, sln
