On Wed, Apr 26, 2017 at 11:53:20AM -0400, Vivien Didelot wrote:
> VLAN aware Marvell chips can program 802.1Q VLAN membership as well as
> 802.1s per VLAN Spanning Tree state using the same 3 VTU Data registers.
>
> Some chips such as 88E6185 use different Data registers offsets for
> ports state and membership, and program them in a single operation.
>
> Other chips such as 88E6352 use the same register layout but program
> them in distinct operations (an indirect table is used for 802.1s.)
>
> Newer chips such as 88E6390 use the same offsets for both state and
> membership in distinct operations, thus require multiple data accesses.
>
> To correctly abstract this, split the "data" structure member of
> mv88e6xxx_vtu_entry in two "state" and "member" members, before adding
> VTU support for newer chips.
>
> Signed-off-by: Vivien Didelot <vivien.dide...@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <and...@lunn.ch>
Andrew
