On Mon, 27 Feb 2017 12:18:31 -0800 Eric Dumazet <eric.duma...@gmail.com> wrote:
> thread 1 thread 2 (could be on same cpu) > > // busy polling or napi_watchdog() > napi_schedule(); > ... > napi->poll() > > device polling: > read 2 packets from ring buffer > Additional 3rd packet is available. > device hard irq > > // does nothing because > NAPI_STATE_SCHED bit is owned by thread 1 > napi_schedule(); > > napi_complete_done(napi, 2); > rearm_irq(); The original design (as Davem mentioned) was that IRQ's must be disabled during device polling. If that was true, then the race above would be impossible. Also NAPI assumes interrupts are level triggered.
