Thanks Russell, On 09/23/2016 11:30 AM, Russell King - ARM Linux wrote: > On Fri, Sep 23, 2016 at 08:13:01PM +0200, Andrew Lunn wrote: >>> Since the hardware requires longword alignment for its' DMA transfers, >>> aligning the IP header will require a memcpy, right? >> >> The vf610 FEC has an SHIFT16 bit in register ENETx_TACC, which inserts >> two padding bits on transmit. ENETx_RACC has the same. >> >> What about your hardware? > > The iMX6 FEC also has that ability - as part of my FEC patch stack from > ages ago, I implemented support for it. > > "net:fec: implement almost zero-copy receive path" > > in my public fec-testing branch. > > That patch stack is sadly now totally dead and I've no interest in > reviving it myself. There was some interest from others in taking my > patch stack over, but that went quiet. >
I'll take a look and hopefully revive at least part of the patch set.
