On Thu, Sep 08, 2016 at 10:22:43AM +0530, Harini Katakam wrote: > I cant be sure of the version of Cadence GEM used in SAMA5D2 > but these registers (sub ns increments alteast) only exist in > the IP version used in Zynq Ultrascale+ MPSoC.
Then you need to find a way to make sure the driver only binds to the correct silicon. Thanks, Richard
