[PATCH 3/4] net: phy: Add read driver for Microsemi PHYs.

[Raju Lakkaraju]

From: Nagaraju Lakkaraju <raju.lakkar...@microsemi.com>

PHY Read support will be added for VSC 85xx Microsemi PHYs.

Signed-off-by: Nagaraju Lakkaraju <raju.lakkar...@microsemi.com>
---
 drivers/net/phy/mscc.c | 25 +++++++++++++++++++++++++
 include/linux/mscc.h   |  8 ++++++++
 2 files changed, 33 insertions(+)

diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 60d9d5f..5a74f81 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -194,6 +194,28 @@ static int vsc85xx_mac_if_get(struct phy_device *phydev,
        return rc;
 }

+static int vsc85xx_phy_read_reg(struct phy_device *phydev,
+                               struct phy_reg_op *data)
+{
+       int rc = 0;
+       u16 reg_addr = data->reg;
+       u8  page = data->pg;
+       u16 reg_val;
+
+       if (page != 0) {
+               mutex_lock(&phydev->lock);
+               rc = vsc85xx_phy_page_set(phydev, page);
+               reg_val = phy_read(phydev, reg_addr);
+               rc = vsc85xx_phy_page_set(phydev, 0);
+               mutex_unlock(&phydev->lock);
+       } else {
+               reg_val = phy_read(phydev, reg_addr);
+       }
+       data->val = reg_val;
+
+       return rc;
+}
+
 static int vsc85xx_features_set(struct phy_device *phydev)
 {
        int rc = 0;
@@ -225,6 +247,9 @@ static int vsc85xx_features_get(struct phy_device *phydev)
        case PHY_MAC_IF:
                rc = vsc85xx_mac_if_get(phydev, &ftrs->mac_if);
                break;
+       case PHY_READ_REG:
+               rc = vsc85xx_phy_read_reg(phydev, ftrs->data);
+               break;
        default:
                break;
        }
diff --git a/include/linux/mscc.h b/include/linux/mscc.h
index dcfd0ae..4265da7 100644
--- a/include/linux/mscc.h
+++ b/include/linux/mscc.h
@@ -12,6 +12,7 @@
 enum phy_features {
        PHY_EDGE_RATE_CONTROL = 0,
        PHY_MAC_IF            = 1,
+       PHY_READ_REG          = 2,
        PHY_SUPPORTED_FEATURES_MAX
 };

@@ -26,10 +27,17 @@ enum rgmii_rx_clock_delay {
        RGMII_RX_CLK_DELAY_3_4_NS = 7
 };

+struct phy_reg_op {
+       u16 reg;
+       u16 val;
+       u8  pg;
+};
+
 struct phy_features_t {
        enum phy_features cmd;           /* PHY Supported Features */
        u8   rate;                       /* Edge rate control */
        phy_interface_t mac_if;          /* MAC interface config */
+       struct phy_reg_op *data;         /* Read/Write register operatioins */
 };

 #endif /*  __LINUX_MSCC_H */
-- 
2.7.4