Hi Florian,

> -----Original Message-----
> From: Florian Fainelli [mailto:f.faine...@gmail.com]
> Sent: 07 June 2016 00:08
> To: Pramod Kumar; Rob Herring; Pawel Moll; Mark Rutland; Ian Campbell;
> Kumar Gala; Catalin Marinas; Will Deacon; Kishon Vijay Abraham I; David S.
> Miller
> Cc: devicet...@vger.kernel.org; netdev@vger.kernel.org; linux-
> ker...@vger.kernel.org; bcm-kernel-feedback-l...@broadcom.com; linux-arm-
> ker...@lists.infradead.org
> Subject: Re: [PATCH v4 4/7] dt: mdio-mux: Add mdio multiplexer driver node
>
> On 06/06/2016 05:41 AM, Pramod Kumar wrote:
> > Add integrated MDIO multiplexer driver node which contains two mux
> > PCIe bus and one ethernet bus along with phys lying on these bus.
> >
> > Signed-off-by: Pramod Kumar <pramod.ku...@broadcom.com>
> > ---
> > +           mdio_mux_iproc: mdio-mux@6602023c {
> > +                   compatible = "brcm,mdio-mux-iproc";
> > +                   reg = <0x6602023c 0x14>;
> > +                   #address-cells = <1>;
> > +                   #size-cells = <0>;
> > +
> > +                   mdio@0 {
> > +                           reg = <0x0>;
> > +                           #address-cells = <1>;
> > +                           #size-cells = <0>;
> > +
> > +                           pci_phy0: pci-phy@0 {
> > +                                   compatible = "brcm,ns2-pcie-phy";
> > +                                   reg = <0x0>;
> > +                                   #phy-cells = <0>;
> > +                           };
> > +                   };
> > +
> > +                   mdio@7 {
> > +                           reg = <0x7>;
> > +                           #address-cells = <1>;
> > +                           #size-cells = <0>;
> > +
> > +                           pci_phy1: pci-phy@0 {
> > +                                   compatible = "brcm,ns2-pcie-phy";
> > +                                   reg = <0x0>;
> > +                                   #phy-cells = <0>;
> > +                           };
>
> Are these two PHYs always available in the NS2 SoC, or does that depend on
> interfaces exposed at the board level? Should not they be flagged with a
> disabled status property by default and enabled in their respective board
> files?
> --

It depends on the interfaces exposed at board level. We will disable it in
dtsi and enable it dts file. I'll address this through next patch set.

> Florian

Regards,
Pramod

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