From: "Michael Chan" <[EMAIL PROTECTED]> Date: Mon, 27 Mar 2006 17:09:33 -0800
> Speed up SRAM read and write functions if possible by using MMIO > instead of config. cycles. With this change, the post reset signature > done at the end of D3 power change must now be moved before the D3 > power change. > > IBM reported a problem on powerpc blades during ethtool self test > that was caused by the memory test taking excessively long. Config. > cycles are very slow on powerpc and the memory test can take more > than 10 seconds to complete using config. cycles. As a result, NETDEV > WATCHDOG can be triggered during self test and the chip can end up in > a funny state. > > Signed-off-by: Michael Chan <[EMAIL PROTECTED]> Applied, but that IBM stuff seems bogus. Even a PCI config space access that is implemented via a Hypervisor call should not take that long. Thanks. - To unsubscribe from this list: send the line "unsubscribe netdev" in the body of a message to [EMAIL PROTECTED] More majordomo info at http://vger.kernel.org/majordomo-info.html
