On Tuesday 07 March 2006 22:19, Benjamin LaHaise wrote:

> At this point I'd just like to stir up some discussion, so please comment
> away with any ideas and concerns.

I think the first step for better spreading of work would be better MSI-X 
support. In particular we need ways for drivers to easily set IRQ affinity
to CPUs. Then the network drivers could do per CPU TX completion
interrupts. This would be relatively easy without too much stack
changes.

It's on my todo list to implement the interrupt infrastructure
for that. Hopefully soon.

This should be HT and dual core aware of course. Also we need
to teach user space irqbalanced to keep its fingers away from these
bound interrupts.

[I know the following is in contrary to DaveM's somewhat vague net channel 
ideas, but  it's much easier and less risky:]

Later devices that support multiple RX queues with hashing could use
the same infrastructure to distribute the receive interrupt and therefore 
softirq to different CPUs.

Now this would still require a CPU<->CPU transfer because the target
CPU selected by the hash is unlikely to be the CPU where the receive
process runs. One way to fix that would be to check if the scheduler
wakeup path could be gotten to slowly migrate the task to the right
CPU to avoid the cache line transfers from the interrupting CPU to
the final user. I don't know if it would work out - my experiences
in writing a NUMA scheduler that tries similar things made me a bit 
sceptical - but perhaps it would  be worth another try.

And alternative way would be to use netchannel ideas to make the CPU<->
CPU transfer more cheap. In particular I liked the concept of using arrays
of pointers as queues instead of double linked lists to be more cache 
friendly.

-Andi
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