> Here is one idea.  Do a reverse LSO, have a dynamic cache on 
> the network card watching saddr/daddr/sport/dport flows, and 
> accumulate as many in-order TCP packets as possible into one 
> large R-LSO frame.
> This accumulation is timed out by a length and time parameter 
> programmable in the chip, just like HW interrupt mitigation is.
> 
> Then the stack receives these (up to 64K) frames.
> 
> This is the kind of discussion of alternative ideas I am 
> _NOT_ seeing.  Which shows how blinded people are to 
> alternatives to TOE.

Number of R-LSO (we call it LRO) hw assists is actually shipping today
in our 10GbE ASIC.
We will submit an LRO driver patch at some point - although MSI-X and
Receive Traffic Hashing driver patches will take precedence.
BTW any comments on the LRO algorithm in my OLS slides are most welcome;
we are looking to extend the implementation in the next ASIC.

> 
> Christoph, you're a really bright guy, perhaps you can sit 
> and come up with some other ideas which would act as 
> stateless alternatives to TOE?  I bet you can do it, if you 
> would simply try...
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