On Wed, 27 Jul 2022 at 15:11, Masataka Ohta <mo...@necom830.hpcl.titech.ac.jp> wrote: > > James Bensley wrote: > > > The BCM16K documentation suggests that it uses TCAM for exact > > matching (e.g.,for ACLs) in something called the "Database Array" > > (with 2M 40b entries?), and SRAM for LPM (e.g., IP lookups) in > > something called the "User Data Array" (with 16M 32b entries?). > > Which documentation? > > According to: > > https://docs.broadcom.com/docs/16000-DS1-PUB > > figure 1 and related explanations: > > Database records 40b: 2048k/1024k. > Table width configurable as 80/160/320/480/640 bits. > User Data Array for associated data, width configurable as > 32/64/128/256 bits. > > means that header extracted by 88690 is analyzed by 16K finally > resulting in 40b (a lot shorter than IPv6 addresses, still may be > enough for IPv6 backbone to identify sites) information by "database" > lookup, which is, obviously by CAM because 40b is painful for > SRAM, converted to "32/64/128/256 bits data".
Hi Masataka, Yes I had read that data sheet. If you have 2M 40b entries in CAM, you could also have 1M 80 entries (or a mixture); the 40b CAM blocks can be chained together to store IPv4/IPv6/MPLS/whatever entries. Cheers, James.
