I can't buy a break. Something changed recently that prevents cmake from embedding an html file into a C header file using a custom cmake command file in the kicad source. Everything works fine when I build KiCad directly using make but when I attempt to build the kicad package using makepkg-mingw, the header file gets corrupted and kicad fails to build. I've attached the html base file, the correctly generated header file (direct make), and the incorrectly generated header file (makepkg-mingw calling make). If anyone know how to resolve this, it would be greatly appreciated.
Freerouter Guidelines:
- in pcbnew, using the Layers Setup dialog:
- choose the number of layers, and enter the name of each layer.
- Front - signal
- Ground - power
- H1_Signal - signal
- V2_Signal - signal
- Power - power
- Back - signal
- in pcbnew: establish board perimeter.
- in pcbnew: load in the netlist so you have all the components defined and instantiated.
- in pcbnew: establish any zones, inclusive of net association.
- in pcbnew: do the degree of component placements you are comfortable with. It is a little easier to accurately position components in pcbnew than in freerouter, but either will work.
- in pcbnew: set up the netclasses. Power traces might be a little thicker than signal traces. If so, add a netclass called 'power'. Make its traces thicker than what you establish for netclass 'Default'. Set trace width, spacing and vias for each netclass.
- in pcbnew: export to DSN.
- load up freerouter (keep it running for any subsequent iterations of 5) through 16) here).
- in freerouter: load the project's *.dsn file. Immediately after a load, all components and traces (if any) will initially be 'fixed'. This is a 'lock in place' toggle that you can undo by selecting a region with your mouse and then selecting 'Unfix' from the menu. Occassionally you may want to re-fix a trace or a part, if only temporarily. This keeps it locked in place.
- useful, not mandatory: in freerouter: set your move snap modulus, which seems to default to 1 internal unit. 20 mils in x and in y is about reasonable.
- in freerouter: finish placing any components, you can change sides of a part here also, rotate, whatever.
- in freerouter: route the board, and save frequently to a *.dsn file while routing in case of power loss. Pick the menu option for saving a full *.dsn file, not a session file (yet). The full freerouter *.dsn file is a superset format, one that can be reloaded in the event of a power loss. Whereas the *.ses file is not a complete design, but only with the *.brd file constitutes a full design. So it is important to backup your work to a *.dsn file while routing in case of power loss.
- in freerouter: when done, or when you want to back import, then save as a session file, *.ses.
- in pcbnew: backimport the session file
- in pcbnew: at this point the zones have to be refilled. One way to do that is to simply run DRC.
These should look something like this (if a 6 layer board):
Notice that after the layer name there is a layer type field, either 'signal' or 'power', typically. Any layer identified as 'power' will be removed from the layer menu in Freerouter, as this will be assumed to contain a power zone.
// Do not edit this file, it is autogenerated by CMake from an HTML file "<ol>\n" "<html>\n" "<li> in pcbnew, using the Layers Setup dialog:</li><br>\n" "<!-- This file is used to autogenerate a *.h file, but you can load it into a browser to preview -->\n" "<h1>Freerouter Guidelines:</h1>\n" " <li>choose the number of layers, and enter the name of each layer.</li><br><br>\n" "<ol>\n" should look something like this (if a 6 layer board):\n" "<li> in pcbnew, using the Layers Setup dialog:</li><br>\n" "<ul>\n" " <li>choose the number of layers, and enter the name of each layer.</li><br><br>\n" " <li>Front - signal</li>\n" " These should look something like this (if a 6 layer board):\n" " <li>Ground - power</li>\n" "<ul>\n" " <li>H1_Signal - signal</li>\n" " <li>Front - signal</li>\n" " <li>Ground - power</li>\n" " <li>V2_Signal - signal</li>\n" " <li>H1_Signal - signal</li>\n" " <li>Power - power</li>\n" \n" " <li>Back - signal</li>\n" " <li>Power - power</li>\n" "</ul><br>\n" signal</li>\n" " Notice that after the layer name there is a layer type field, either 'signal' or 'power', typically.\n" " Notice that after the layer name there is a layer type field, either 'signal' or 'power', typically.\n" " as this will be assumed to contain a power zone.\n" the layer menu in Freerouter,\n" " as this will be assumed to contain a power zone.\n" "</li><br><br>\n" "</li><br><br>\n" stablish board perimeter.</li><br>\n" "<li> in pcbnew: load in the netlist so you have all the components defined and instantiated.</li><br>\n" "<li> in pcbnew: establish any zones, inclusive of net association.</li><br>\n" nstantiated.</li><br>\n" "<li> in pcbnew: do the degree of component placements you are comfortable with.\n" " It is a little easier to accurately position components in pcbnew than in\n" "<li> in pcbnew: do the degree of component placements you are comfortable with.\n" " freerouter, but either will work.</li><br>\n" mponents in pcbnew than in\n" " freerouter, but either will work.</li><br>\n" "<li> in pcbnew: set up the netclasses. Power traces might be a little thicker\n" "<li> in pcbnew: set up the netclasses. Power traces might be a little thicker\n" " than signal traces. If so, add a netclass called 'power'.\n" " Make its traces thicker than what you establish for netclass 'Default'.\n" " Set trace width, spacing and vias for each netclass.</li><br>\n" " Make its traces thicker than what you establish for netclass 'Default'.\n" "<li> in pcbnew: export to DSN.</li><br>\n" ach netclass.</li><br>\n" "<li> load up freerouter (keep it running for any subsequent iterations of 5) through 16) here).</li><br>\n" "<li> in freerouter: load the project's *.dsn file. Immediately after a load, all\n" 16) here).</li><br>\n" " components and traces (if any) will initially be 'fixed'. This is a 'lock\n"
" components and traces (if any) will initially be 'fixed'. This is a 'lock\n" " in place' toggle that you can undo by selecting a region with your mouse\n" " and then selecting 'Unfix' from the menu. Occassionally you may want to\n" " re-fix a trace or a part, if only temporarily. This keeps it locked in\n" " place.\n" " place.\n" "</li><br>\n" "</li><br>\n" "<li> useful, not mandatory: in freerouter: set your move snap modulus, which seems\n" "<li> useful, not mandatory: in freerouter: set your move snap modulus, which seems\n" " to default to 1 internal unit.\n" " to default to 1 internal unit.\n" " 20 mils in x and in y is about reasonable.</li><br>\n" " 20 mils in x and in y is about reasonable.</li><br>\n" ange sides of a part\n" "<li> in freerouter: finish placing any components, you can change sides of a part\n" " here also, rotate, whatever.</li><br>\n" "<li> in freerouter: route the board, and save frequently to a *.dsn file while\n" "<li> in freerouter: route the board, and save frequently to a *.dsn file while\n" " routing in case of power loss. Pick the menu option for saving a full *.dsn\n" " file, not a session file (yet). The full freerouter *.dsn file is a superset\n" " routing in case of power loss. Pick the menu option for saving a full *.dsn\n" " format, one that can be reloaded in the event of a power loss. Whereas the\n" " file, not a session file (yet). The full freerouter *.dsn file is a superset\n" " *.ses file is not a complete design, but only with the *.brd file\n" the\n" " constitutes a full design. So it is important to backup your work to a\n" " constitutes a full design. So it is important to backup your work to a\n" " *.dsn file while routing in case of power loss.</li><br>\n" "<li> in freerouter: when done, or when you want to back import, then save as a session file, *.ses.</li><br>\n" "<li> in pcbnew: backimport the session file</li><br>\n" mport, then save as a session file, *.ses.</li><br>\n" "<li> in pcbnew: backimport the session file</li><br>\n" ed. One way to do that\n" "<li> in pcbnew: at this point the zones have to be refilled. One way to do that\n" "</ol>\n" "</html>\n" " is to simply run DRC.</li>\n" "</ol>\n" "</html>\n"
// Do not edit this file, it is autogenerated by CMake from an HTML file "<html>\n" "<!-- This file is used to autogenerate a *.h file, but you can load it into a browser to preview -->\n" "<h1>Freerouter Guidelines:</h1>\n" "<ol>\n" "<li> in pcbnew, using the Layers Setup dialog:</li><br>\n" " <li>choose the number of layers, and enter the name of each layer.</li><br><br>\n" " These should look something like this (if a 6 layer board):\n" "<ul>\n" " <li>Front - signal</li>\n" " <li>Ground - power</li>\n" " <li>H1_Signal - signal</li>\n" " <li>V2_Signal - signal</li>\n" " <li>Power - power</li>\n" " <li>Back - signal</li>\n" "</ul><br>\n" " Notice that after the layer name there is a layer type field, either 'signal' or 'power', typically.\n" " Any layer identified as 'power' will be removed from the layer menu in Freerouter,\n" " as this will be assumed to contain a power zone.\n" "</li><br><br>\n" "<li> in pcbnew: establish board perimeter.</li><br>\n" "<li> in pcbnew: load in the netlist so you have all the components defined and instantiated.</li><br>\n" "<li> in pcbnew: establish any zones, inclusive of net association.</li><br>\n" "<li> in pcbnew: do the degree of component placements you are comfortable with.\n" " It is a little easier to accurately position components in pcbnew than in\n" " freerouter, but either will work.</li><br>\n" "<li> in pcbnew: set up the netclasses. Power traces might be a little thicker\n" " than signal traces. If so, add a netclass called 'power'.\n" " Make its traces thicker than what you establish for netclass 'Default'.\n" " Set trace width, spacing and vias for each netclass.</li><br>\n" "<li> in pcbnew: export to DSN.</li><br>\n" "<li> load up freerouter (keep it running for any subsequent iterations of 5) through 16) here).</li><br>\n" "<li> in freerouter: load the project's *.dsn file. Immediately after a load, all\n" " components and traces (if any) will initially be 'fixed'. This is a 'lock\n" " in place' toggle that you can undo by selecting a region with your mouse\n" " and then selecting 'Unfix' from the menu. Occassionally you may want to\n" " re-fix a trace or a part, if only temporarily. This keeps it locked in\n" " place.\n" "</li><br>\n" "<li> useful, not mandatory: in freerouter: set your move snap modulus, which seems\n" " to default to 1 internal unit.\n" " 20 mils in x and in y is about reasonable.</li><br>\n" "<li> in freerouter: finish placing any components, you can change sides of a part\n" " here also, rotate, whatever.</li><br>\n" "<li> in freerouter: route the board, and save frequently to a *.dsn file while\n" " routing in case of power loss. Pick the menu option for saving a full *.dsn\n" " file, not a session file (yet). The full freerouter *.dsn file is a superset\n" " format, one that can be reloaded in the event of a power loss. Whereas the\n" " *.ses file is not a complete design, but only with the *.brd file\n" " constitutes a full design. So it is important to backup your work to a\n" " *.dsn file while routing in case of power loss.</li><br>\n" "<li> in freerouter: when done, or when you want to back import, then save as a session file, *.ses.</li><br>\n" "<li> in pcbnew: backimport the session file</li><br>\n" "<li> in pcbnew: at this point the zones have to be refilled. One way to do that\n" " is to simply run DRC.</li>\n" "</ol>\n" "</html>\n"
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