Author: zoltan
Date: 2008-02-08 09:28:06 -0500 (Fri, 08 Feb 2008)
New Revision: 95254
Modified:
trunk/mono/mono/arch/ChangeLog
trunk/mono/mono/arch/arm/arm-codegen.h
Log:
2008-02-08 Zoltan Varga <[EMAIL PROTECTED]>
* arm/arm-codegen.h: Fix the ordering of arguments for some load/store
opcodes
so they are consistent.
Modified: trunk/mono/mono/arch/ChangeLog
===================================================================
--- trunk/mono/mono/arch/ChangeLog 2008-02-08 14:26:15 UTC (rev 95253)
+++ trunk/mono/mono/arch/ChangeLog 2008-02-08 14:28:06 UTC (rev 95254)
@@ -1,3 +1,8 @@
+2008-02-08 Zoltan Varga <[EMAIL PROTECTED]>
+
+ * arm/arm-codegen.h: Fix the ordering of arguments for some load/store
opcodes
+ so they are consistent.
+
2008-01-24 Zoltan Varga <[EMAIL PROTECTED]>
* Makefile.am (SUBDIRS): Or if INTERP_SUPPORTED is true.
Modified: trunk/mono/mono/arch/arm/arm-codegen.h
===================================================================
--- trunk/mono/mono/arch/arm/arm-codegen.h 2008-02-08 14:26:15 UTC (rev
95253)
+++ trunk/mono/mono/arch/arm/arm-codegen.h 2008-02-08 14:28:06 UTC (rev
95254)
@@ -790,22 +790,22 @@
#define ARM_DEF_HXFER_REG_MINUS_REG_COND(rm, h, s, rd, rn, ls, wb, p, cond) \
ARM_DEF_HXFER_REG_REG_UPDOWN_COND(rm, h, s, rd, rn, ls, wb, ARM_DOWN,
p, cond)
-#define ARM_LDRH_REG_REG_COND(p, rm, rd, rn, cond) \
+#define ARM_LDRH_REG_REG_COND(p, rd, rm, rn, cond) \
ARM_EMIT(p, ARM_DEF_HXFER_REG_REG_COND(rm, 1, 0, rd, rn, ARMOP_LDR, 0,
1, cond))
-#define ARM_LDRH_REG_REG(p, rm, rd, rn) \
- ARM_LDRH_REG_REG_COND(p, rm, rd, rn, ARMCOND_AL)
-#define ARM_LDRSH_REG_REG_COND(p, rm, rd, rn, cond) \
+#define ARM_LDRH_REG_REG(p, rd, rm, rn) \
+ ARM_LDRH_REG_REG_COND(p, rd, rm, rn, ARMCOND_AL)
+#define ARM_LDRSH_REG_REG_COND(p, rd, rm, rn, cond) \
ARM_EMIT(p, ARM_DEF_HXFER_REG_REG_COND(rm, 1, 1, rd, rn, ARMOP_LDR, 0,
1, cond))
-#define ARM_LDRSH_REG_REG(p, rm, rd, rn) \
- ARM_LDRSH_REG_REG_COND(p, rm, rd, rn, ARMCOND_AL)
-#define ARM_LDRSB_REG_REG_COND(p, rm, rd, rn, cond) \
+#define ARM_LDRSH_REG_REG(p, rd, rm, rn) \
+ ARM_LDRSH_REG_REG_COND(p, rd, rm, rn, ARMCOND_AL)
+#define ARM_LDRSB_REG_REG_COND(p, rd, rm, rn, cond) \
ARM_EMIT(p, ARM_DEF_HXFER_REG_REG_COND(rm, 0, 1, rd, rn, ARMOP_LDR, 0,
1, cond))
-#define ARM_LDRSB_REG_REG(p, rm, rd, rn) ARM_LDRSB_REG_REG_COND(p, rm, rd, rn,
ARMCOND_AL)
+#define ARM_LDRSB_REG_REG(p, rd, rm, rn) ARM_LDRSB_REG_REG_COND(p, rd, rm, rn,
ARMCOND_AL)
-#define ARM_STRH_REG_REG_COND(p, rm, rd, rn, cond) \
+#define ARM_STRH_REG_REG_COND(p, rd, rm, rn, cond) \
ARM_EMIT(p, ARM_DEF_HXFER_REG_REG_COND(rm, 1, 0, rd, rn, ARMOP_STR, 0,
1, cond))
-#define ARM_STRH_REG_REG(p, rm, rd, rn) \
- ARM_STRH_REG_REG_COND(p, rm, rd, rn, ARMCOND_AL)
+#define ARM_STRH_REG_REG(p, rd, rm, rn) \
+ ARM_STRH_REG_REG_COND(p, rd, rm, rn, ARMCOND_AL)
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