Author: zoltan
Date: 2008-02-08 07:36:15 -0500 (Fri, 08 Feb 2008)
New Revision: 95237

Modified:
   trunk/mono/mono/mini/ChangeLog
   trunk/mono/mono/mini/cpu-ia64.md
   trunk/mono/mono/mini/cpu-s390.md
   trunk/mono/mono/mini/mini-ia64.c
   trunk/mono/mono/mini/mini-ia64.h
   trunk/mono/mono/mini/mini.c
Log:
2008-02-08  Zoltan Varga  <[EMAIL PROTECTED]>

        * mini.c (mono_normalize_opcodes): Remap CEE_CONV_R4/R8 properly.

        * cpu-s390x.md: Add OP_LCONV_TO_R4/R8.

        * cpu-ia64.md mini-ia64.h mini-ia64.c: Get rid of CEE_ opcodes.


Modified: trunk/mono/mono/mini/ChangeLog
===================================================================
--- trunk/mono/mono/mini/ChangeLog      2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/ChangeLog      2008-02-08 12:36:15 UTC (rev 95237)
@@ -1,5 +1,11 @@
 2008-02-08  Zoltan Varga  <[EMAIL PROTECTED]>
 
+       * mini.c (mono_normalize_opcodes): Remap CEE_CONV_R4/R8 properly.
+
+       * cpu-s390x.md: Add OP_LCONV_TO_R4/R8.
+
+       * cpu-ia64.md mini-ia64.h mini-ia64.c: Get rid of CEE_ opcodes.
+
        * mini-ops.h: Add OP_ICONV_TO_R_UN opcode.
 
        * mini.c (mono_normalize_opcodes): Remap CEE_CONV_R_UN too.

Modified: trunk/mono/mono/mini/cpu-ia64.md
===================================================================
--- trunk/mono/mono/mini/cpu-ia64.md    2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/cpu-ia64.md    2008-02-08 12:36:15 UTC (rev 95237)
@@ -8,49 +8,9 @@
 break: len:48
 jmp: len:48
 br: len:48
-beq: len:48
-bge: len:48
-bgt: len:48
-ble: len:48
-blt: len:48
-bne.un: len:48
-bge.un: len:48
-bgt.un: len:48
-ble.un: len:48
-blt.un: len:48
-add: dest:i src1:i src2:i len:48
-sub: dest:i src1:i src2:i len:48
-mul: dest:i src1:i src2:i len:48
-div: dest:a src1:a src2:i len:48 clob:d
-div.un: dest:a src1:a src2:i len:48 clob:d
-rem: dest:d src1:a src2:i len:48 clob:a
-rem.un: dest:d src1:a src2:i len:48 clob:a
-and: dest:i src1:i src2:i len:48
-or: dest:i src1:i src2:i len:48
-xor: dest:i src1:i src2:i len:48
-shl: dest:i src1:i src2:s len:48
-shr: dest:i src1:i src2:s len:48
-shr.un: dest:i src1:i src2:s len:48
-neg: dest:i src1:i len:48
-not: dest:i src1:i len:48
-conv.i1: dest:i src1:i len:48
-conv.i2: dest:i src1:i len:48
-conv.i4: dest:i src1:i len:48
-conv.i8: dest:i src1:i len:48
-conv.r4: dest:f src1:i len:112
-conv.r8: dest:f src1:i len:112
-conv.u4: dest:i src1:i len:112
-conv.u8: dest:i src1:i len:112
-conv.r.un: dest:f src1:i len:48
 throw: src1:i len:96
 rethrow: src1:i len:48
-conv.ovf.i4.un: dest:i src1:i len:96
-conv.ovf.u4.un: 
-conv.ovf.u4: dest:i src1:i len:48
 ckfinite: dest:f src1:f len:48
-conv.u2: dest:i src1:i len:48
-conv.u1: dest:i src1:i len:48
-conv.i: dest:i src1:i len:48
 mul.ovf: dest:i src1:i src2:i len:48
 # this opcode is handled specially in the code generator
 mul.ovf.un: dest:i src1:i src2:i len:48
@@ -149,24 +109,6 @@
 cond_exc_nc: len:48
 cond_exc_iov: len:48
 cond_exc_ic: len:48
-long_mul: dest:i src1:i src2:i len:48
-long_mul_imm: dest:i src1:i src2:i len:48
-long_div: dest:a src1:a src2:i len:48 clob:d
-long_div_un: dest:a src1:a src2:i len:48 clob:d
-long_rem: dest:d src1:a src2:i len:48 clob:a
-long_rem_un: dest:d src1:a src2:i len:48 clob:a
-long_shl: dest:i src1:i src2:s len:48
-long_shr: dest:i src1:i src2:s len:48
-long_shr_un: dest:i src1:i src2:s len:48
-long_conv_to_r4: dest:f src1:i len:48
-long_conv_to_r8: dest:f src1:i len:48
-long_conv_to_ovf_i: dest:i src1:i src2:i len:48
-long_mul_ovf: dest:i src1:i src2:i len:48
-long_mul_ovf_un: dest:i src1:i src2:i len:48
-long_conv_to_r_un: dest:f src1:i src2:i len:48 
-long_shr_imm: dest:i src1:i len:48
-long_shr_un_imm: dest:i src1:i len:48
-long_shl_imm: dest:i src1:i len:48
 float_beq: len:48
 float_bne_un: len:48
 float_blt: len:48
@@ -302,6 +244,56 @@
 int_ble: len:48
 int_ble_un: len:48
 
+# 64 bit opcodes
+long_add: dest:i src1:i src2:i len:48
+long_sub: dest:i src1:i src2:i len:48
+long_mul: dest:i src1:i src2:i len:48
+long_div: dest:a src1:a src2:i len:48 clob:d
+long_div_un: dest:a src1:a src2:i len:48 clob:d
+long_rem: dest:d src1:a src2:i len:48 clob:a
+long_rem_un: dest:d src1:a src2:i len:48 clob:a
+long_and: dest:i src1:i src2:i len:48
+long_or: dest:i src1:i src2:i len:48
+long_xor: dest:i src1:i src2:i len:48
+long_shl: dest:i src1:i src2:s len:48
+long_shr: dest:i src1:i src2:s len:48
+long_shr_un: dest:i src1:i src2:s len:48
+long_neg: dest:i src1:i len:48
+long_not: dest:i src1:i len:48
+long_conv_to_i1: dest:i src1:i len:48
+long_conv_to_i2: dest:i src1:i len:48
+long_conv_to_i4: dest:i src1:i len:48
+long_conv_to_i8: dest:i src1:i len:48
+long_conv_to_r4: dest:f src1:i len:112
+long_conv_to_r8: dest:f src1:i len:112
+long_conv_to_u4: dest:i src1:i len:112
+long_conv_to_u8: dest:i src1:i len:112
+long_conv_to_r_un: dest:f src1:i len:48
+long_conv_to_ovf_i: dest:i src1:i src2:i len:48
+long_conv_to_ovf_i4_un: dest:i src1:i len:96
+long_conv_to_ovf_u4: dest:i src1:i len:48
+long_conv_to_u2: dest:i src1:i len:48
+long_conv_to_u1: dest:i src1:i len:48
+long_conv_to_i: dest:i src1:i len:48
+
+long_mul_imm: dest:i src1:i src2:i len:48
+long_mul_ovf: dest:i src1:i src2:i len:48
+long_mul_ovf_un: dest:i src1:i src2:i len:48
+long_shr_imm: dest:i src1:i len:48
+long_shr_un_imm: dest:i src1:i len:48
+long_shl_imm: dest:i src1:i len:48
+
+long_beq: len:48
+long_bge: len:48
+long_bgt: len:48
+long_ble: len:48
+long_blt: len:48
+long_bne_un: len:48
+long_bge_un: len:48
+long_bgt_un: len:48
+long_ble_un: len:48
+long_blt_un: len:48
+
 ia64_cmp4_eq: src1:i src2:i len:48
 ia64_cmp4_ne: src1:i src2:i len:48
 ia64_cmp4_le: src1:i src2:i len:48

Modified: trunk/mono/mono/mini/cpu-s390.md
===================================================================
--- trunk/mono/mono/mini/cpu-s390.md    2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/cpu-s390.md    2008-02-08 12:36:15 UTC (rev 95237)
@@ -150,6 +150,8 @@
 long_add_ovf: len:28 dest:l src1:l src2:i clob:1
 long_conv_to_ovf_i: dest:i src1:i src2:i len:44
 long_conv_to_r_un: dest:f src1:i src2:i len:37 
+long_conv_to_r4: dest:f src1:i len:4
+long_conv_to_r8: dest:f src1:i len:4
 long_mul_ovf: len: 18
 long_mul_ovf_un: len: 18 
 long_sub: len: 18 dest:l src1:l src2:i clob:1

Modified: trunk/mono/mono/mini/mini-ia64.c
===================================================================
--- trunk/mono/mono/mini/mini-ia64.c    2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/mini-ia64.c    2008-02-08 12:36:15 UTC (rev 95237)
@@ -1358,7 +1358,7 @@
                                NEW_INS (cfg, ins, temp, OP_I8CONST);
                                temp->inst_c0 = ins->inst_offset;
                                temp->dreg = mono_regstate_next_int (cfg->rs);
-                               NEW_INS (cfg, ins, temp2, CEE_ADD);
+                               NEW_INS (cfg, ins, temp2, OP_LADD);
                                temp2->sreg1 = ins->inst_destbasereg;
                                temp2->sreg2 = temp->dreg;
                                temp2->dreg = mono_regstate_next_int (cfg->rs);
@@ -1416,7 +1416,7 @@
                                NEW_INS (cfg, ins, temp, OP_I8CONST);
                                temp->inst_c0 = ins->inst_offset;
                                temp->dreg = mono_regstate_next_int (cfg->rs);
-                               NEW_INS (cfg, ins, temp2, CEE_ADD);
+                               NEW_INS (cfg, ins, temp2, OP_LADD);
                                temp2->sreg1 = ins->inst_destbasereg;
                                temp2->sreg2 = temp->dreg;
                                temp2->dreg = mono_regstate_next_int (cfg->rs);
@@ -1455,7 +1455,7 @@
                                NEW_INS (cfg, ins, temp, OP_I8CONST);
                                temp->inst_c0 = ins->inst_offset;
                                temp->dreg = mono_regstate_next_int (cfg->rs);
-                               NEW_INS (cfg, ins, temp2, CEE_ADD);
+                               NEW_INS (cfg, ins, temp2, OP_LADD);
                                temp2->sreg1 = ins->inst_basereg;
                                temp2->sreg2 = temp->dreg;
                                temp2->dreg = mono_regstate_next_int (cfg->rs);
@@ -1531,7 +1531,7 @@
 
                        switch (ins->opcode) {
                        case OP_ADD_IMM:                                        
-                               ins->opcode = CEE_ADD;
+                               ins->opcode = OP_LADD;
                                break;
                        case OP_IADD_IMM:
                                ins->opcode = OP_IADD;
@@ -1558,7 +1558,7 @@
                                ins->opcode = OP_ISHR_UN;
                                break;
                        case OP_AND_IMM:
-                               ins->opcode = CEE_AND;
+                               ins->opcode = OP_LAND;
                                break;
                        case OP_SHL_IMM:
                                ins->opcode = OP_LSHL;
@@ -1627,16 +1627,16 @@
                        }
 
                        switch (next->opcode) {
-                       case CEE_BEQ:
-                       case CEE_BNE_UN:
-                       case CEE_BLE:
-                       case CEE_BGT:
-                       case CEE_BLE_UN:
-                       case CEE_BGT_UN:
-                       case CEE_BGE:
-                       case CEE_BLT:
-                       case CEE_BGE_UN:
-                       case CEE_BLT_UN:
+                       case OP_LBEQ:
+                       case OP_LBNE_UN:
+                       case OP_LBLE:
+                       case OP_LBGT:
+                       case OP_LBLE_UN:
+                       case OP_LBGT_UN:
+                       case OP_LBGE:
+                       case OP_LBLT:
+                       case OP_LBGE_UN:
+                       case OP_LBLT_UN:
                        case OP_IBEQ:
                        case OP_IBNE_UN:
                        case OP_IBLE:
@@ -1690,16 +1690,16 @@
 
                        ins->opcode = opcode_to_ia64_cmp (next->opcode, 
ins->opcode);
                        switch (next->opcode) {
-                       case CEE_BEQ:
-                       case CEE_BNE_UN:
-                       case CEE_BLE:
-                       case CEE_BGE:
-                       case CEE_BLT:
-                       case CEE_BGT:
-                       case CEE_BLE_UN:
-                       case CEE_BGE_UN:
-                       case CEE_BLT_UN:
-                       case CEE_BGT_UN:
+                       case OP_LBEQ:
+                       case OP_LBNE_UN:
+                       case OP_LBLE:
+                       case OP_LBGE:
+                       case OP_LBLT:
+                       case OP_LBGT:
+                       case OP_LBLE_UN:
+                       case OP_LBGE_UN:
+                       case OP_LBLT_UN:
+                       case OP_LBGT_UN:
                        case OP_IBEQ:
                        case OP_IBNE_UN:
                        case OP_IBLE:
@@ -1786,7 +1786,7 @@
                                                if (sum_reg == 0)
                                                        sum_reg = temp->dreg;
                                                else {
-                                                       NEW_INS (cfg, ins, 
temp2, CEE_ADD);
+                                                       NEW_INS (cfg, ins, 
temp2, OP_LADD);
                                                        temp2->dreg = 
mono_regstate_next_int (cfg->rs);
                                                        temp2->sreg1 = sum_reg;
                                                        temp2->sreg2 = 
temp->dreg;
@@ -1799,7 +1799,7 @@
                        }
                        break;
                }
-               case CEE_CONV_OVF_U4:
+               case OP_LCONV_TO_OVF_U4:
                        NEW_INS (cfg, ins, temp, OP_IA64_CMP4_LT);
                        temp->sreg1 = ins->sreg1;
                        temp->sreg2 = IA64_R0;
@@ -1809,7 +1809,7 @@
 
                        ins->opcode = OP_MOVE;
                        break;
-               case CEE_CONV_OVF_I4_UN:
+               case OP_LCONV_TO_OVF_I4_UN:
                        NEW_INS (cfg, ins, temp, OP_ICONST);
                        temp->inst_c0 = 0x7fffffff;
                        temp->dreg = mono_regstate_next_int (cfg->rs);
@@ -2156,28 +2156,28 @@
                        ia64_mov_to_br (code, IA64_B6, ins->sreg1);
                        ia64_br_cond_reg (code, IA64_B6);
                        break;
-               case CEE_ADD:
+               case OP_LADD:
                case OP_IADD:
                        ia64_add (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
-               case CEE_AND:
+               case OP_LAND:
                case OP_IAND:
                        ia64_and (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
                case OP_IOR:
-               case CEE_OR:
+               case OP_LOR:
                        ia64_or (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
                case OP_IXOR:
-               case CEE_XOR:
+               case OP_LXOR:
                        ia64_xor (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
                case OP_INEG:
-               case CEE_NEG:
+               case OP_LNEG:
                        ia64_sub (code, ins->dreg, IA64_R0, ins->sreg1);
                        break;
                case OP_INOT:
-               case CEE_NOT:
+               case OP_LNOT:
                        ia64_andcm_imm (code, ins->dreg, -1, ins->sreg1);
                        break;
                case OP_ISHL:
@@ -2191,14 +2191,13 @@
                        ia64_zxt4 (code, GP_SCRATCH_REG, ins->sreg1);
                        ia64_shr_u (code, ins->dreg, GP_SCRATCH_REG, 
ins->sreg2);
                        break;
-               case CEE_SHL:
                case OP_LSHL:
                        ia64_shl (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
                case OP_LSHR_UN:
                        ia64_shr_u (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
-               case CEE_SUB:
+               case OP_LSUB:
                case OP_ISUB:
                        ia64_sub (code, ins->dreg, ins->sreg1, ins->sreg2);
                        break;
@@ -2298,7 +2297,7 @@
                case OP_LSHR_UN_IMM:
                        ia64_shr_u_imm (code, ins->dreg, ins->sreg1, 
ins->inst_imm);
                        break;
-               case CEE_MUL:
+               case OP_LMUL:
                        /* Based on gcc code */
                        ia64_setf_sig (code, FP_SCRATCH_REG, ins->sreg1);
                        ia64_setf_sig (code, FP_SCRATCH_REG2, ins->sreg2);
@@ -2563,36 +2562,36 @@
                        ia64_no_stop (code);
                        ia64_add1_pred (code, 6, ins->dreg, IA64_R0, IA64_R0);
                        break;
-               case CEE_CONV_I1:
+               case OP_LCONV_TO_I1:
                        /* FIXME: Is this needed ? */
                        ia64_sxt1 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_I2:
+               case OP_LCONV_TO_I2:
                        /* FIXME: Is this needed ? */
                        ia64_sxt2 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_I4:
+               case OP_LCONV_TO_I4:
                        /* FIXME: Is this needed ? */
                        ia64_sxt4 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_U1:
+               case OP_LCONV_TO_U1:
                        /* FIXME: Is this needed */
                        ia64_zxt1 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_U2:
+               case OP_LCONV_TO_U2:
                        /* FIXME: Is this needed */
                        ia64_zxt2 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_U4:
+               case OP_LCONV_TO_U4:
                        /* FIXME: Is this needed */
                        ia64_zxt4 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_I8:
-               case CEE_CONV_I:
+               case OP_LCONV_TO_I8:
+               case OP_LCONV_TO_I:
                        ia64_sxt4 (code, ins->dreg, ins->sreg1);
                        break;
-               case CEE_CONV_U8:
-               case CEE_CONV_U:
+               case OP_LCONV_TO_U8:
+               case OP_LCONV_TO_U:
                        ia64_zxt4 (code, ins->dreg, ins->sreg1);
                        break;
 
@@ -2644,28 +2643,16 @@
                        ia64_ldfs (code, ins->dreg, ins->inst_basereg);
                        ia64_fnorm_d_sf (code, ins->dreg, ins->dreg, 0);
                        break;
-               case CEE_CONV_R4:
+               case OP_LCONV_TO_R4:
                        ia64_setf_sig (code, ins->dreg, ins->sreg1);
                        ia64_fcvt_xf (code, ins->dreg, ins->dreg);
                        ia64_fnorm_s_sf (code, ins->dreg, ins->dreg, 0);
                        break;
-               case CEE_CONV_R8:
-                       ia64_setf_sig (code, ins->dreg, ins->sreg1);
-                       ia64_fcvt_xf (code, ins->dreg, ins->dreg);
-                       ia64_fnorm_d_sf (code, ins->dreg, ins->dreg, 0);
-                       break;
                case OP_LCONV_TO_R8:
-                       /* FIXME: Difference with CEE_CONV_R8 ? */
                        ia64_setf_sig (code, ins->dreg, ins->sreg1);
                        ia64_fcvt_xf (code, ins->dreg, ins->dreg);
                        ia64_fnorm_d_sf (code, ins->dreg, ins->dreg, 0);
                        break;
-               case OP_LCONV_TO_R4:
-                       /* FIXME: Difference with CEE_CONV_R4 ? */
-                       ia64_setf_sig (code, ins->dreg, ins->sreg1);
-                       ia64_fcvt_xf (code, ins->dreg, ins->dreg);
-                       ia64_fnorm_s_sf (code, ins->dreg, ins->dreg, 0);
-                       break;
                case OP_FCONV_TO_R4:
                        ia64_fnorm_s_sf (code, ins->dreg, ins->sreg1, 0);
                        break;

Modified: trunk/mono/mono/mini/mini-ia64.h
===================================================================
--- trunk/mono/mono/mini/mini-ia64.h    2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/mini-ia64.h    2008-02-08 12:36:15 UTC (rev 95237)
@@ -192,5 +192,6 @@
 #define MONO_ARCH_HAVE_ATOMIC_EXCHANGE 1
 #define MONO_ARCH_HAVE_IMT 1
 #define MONO_ARCH_COMMON_VTABLE_TRAMPOLINE 1
+#define MONO_ARCH_ENABLE_NORMALIZE_OPCODES 1
 
 #endif /* __MONO_MINI_IA64_H__ */  

Modified: trunk/mono/mono/mini/mini.c
===================================================================
--- trunk/mono/mono/mini/mini.c 2008-02-08 11:32:37 UTC (rev 95236)
+++ trunk/mono/mono/mini/mini.c 2008-02-08 12:36:15 UTC (rev 95237)
@@ -10899,8 +10899,8 @@
                remap_table [CEE_CONV_OVF_I4_UN] = OP_LCONV_TO_OVF_I4_UN;
 #else
 #endif
-               remap_table [CEE_CONV_R4] = OP_ICONV_TO_R4;
-               remap_table [CEE_CONV_R8] = OP_ICONV_TO_R8;
+               remap_table [CEE_CONV_R4] = REMAP_OPCODE (CONV_TO_R4);
+               remap_table [CEE_CONV_R8] = REMAP_OPCODE (CONV_TO_R8);
                remap_table [CEE_CONV_I4] = OP_MOVE;
                remap_table [CEE_CONV_U4] = OP_MOVE;
                remap_table [CEE_CONV_I1] = REMAP_OPCODE (CONV_TO_I1);

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