Request for CPAN registration
* your name: Wim Vanderbauwhede
* your email address: [EMAIL PROTECTED]
* your homepage: http://comms.eee.strath.ac.uk/~wim
* your preferred user-ID on CPAN: WVDB
* a short description of what you're planning to contribute:
1. SynSim - a simulation automation tool.
SynSim is a template-driven simulation automation tool. With SynSim, you can
execute thousands of simulations automatically. I use it to run simulations on
an optical packet switching node with different types of traffic, different
buffer depths etc. Postprocessing includes basic statistical analysis and
automatic generation of PostScript plots with Gnuplot.
2. Verilog::DeviceLibs - an OO Verilog code generator
This is a Verilog code generator. It allows to create parametrizable Verilog
modules and to generates the testbenches. You create an object based on a
template (there's a GUI to help you), and this object generates the Verilog
code depending on the values of it's attributes.
Thanks,
Wim Vanderbauwhede
