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;)
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A patent asset owner has various
options
for realizing value from their asset. This article, however,
will
focus on patent asset use in an assertion-based exploitation
model.
This model has been successfully used by a large and growing
number
of companies and other parties.
The starting point for such a process is
to invest
the necessary resources to evaluate the contents of the
patent portfolio
in order to determine which patents are the best candidates
for
having commercial value. Such review processes may be
undertaken
using internal technical and legal resources, or through
external
RE companies such as Chipworks. Whatever channel is used,
the reviews
must provide an honest assessment of the commercial value at
the
level of individual patents.
The general assertion-based patent
exploitation
model involves the broad steps of homework, assertion,
negotiation
and contract completion. The homework step requires
completion of
a number of company-specific items, such as competitive
intelligence,
assertion strategy, reverse engineering (RE) and proof
package.
The assertion step involves use of the homework through
presentation
and dialogue with the other party. When done effectively, a
successful
patent licensing negotiation and contract execution with the
other
party will follow.
Table 1 identifies the key process
steps
and functional mapping taken by many companies. This is not
the
only approach possible, but it is one that has worked very
well
in many instances. con't...
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Table 1 - Company-Specific Steps Needed for
Assertion-Based
Exploitation Process
Click
for larger image
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Just
received - Micron ® Quad Data Rate™
(QDR™)
SRAM
The Micron ® Quad
Data
Rate™ (QDR™) SRAM is a high-speed,
low-latency,
maximum-bandwidth, separate I/O, synchronous memory.
It integrates
simple control logic and clocking schemes with
programmable
impedance, a well-placed pinout, and an inexpensive
small-footprint
package. The QDR features advanced 6 transistor SRAM
cell
CMOS process. Click
for more info on this analysis project.
Before we start our
investigation,
what type of analysis would you like to see on this
device?
To ensure that our
reverse
engineering project meets your requirements contact
us immediately. |
|
The semiconductor industry at present
seems to
be in the doldrums - drifting, waiting for the economic
winds of
fortune to pick up and indicate a direction. One of the
tools to
find a direction is competitive intelligence (CI) —the
systematic
process of monitoring the competitive environment.
The CI process can be broken into phases:
- Planning - identifying intelligence
needs,
and designing the data collection process
- Data collection and analysis (including
interpretation)
- Creating recommendations for action
- Dissemination of findings and
recommendations
- Feedback into the next planning
phase
A key goal of CI is to present
timely intelligence
that allows decision makers to use the information for
competitive
advantage. Consequently the CI process must be able to
collect data
efficiently, distill it quickly, and present swiftly and
clearly.
If the process becomes an end in itself, then it becomes a
waste
of time and expense. con't
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Chipworks’
Focused Technology Reviews (FTRs) compare how a process
feature
or a circuit block has been implemented across many
different semiconductor
chips or manufacturers.
The FTR is an exceptional value, providing
access
to many reports often at a lower cost than purchasing a
single complete
device report. For example, the On-Die
Interconnect Focused Technology Review takes a look at
nineteen
of today’s leading copper and aluminum interconnect
(wiring)
structures from eleven different logic device manufacturers.
Purchasing
the individual full device reports could easily cost in
excess of
$100K, whereas the FTR compilation is priced at only $5K.
Other process related FTRs survey Shallow
Trench Isolation Techniques and embedded memory
implementations
across a number of manufacturers - SRAM
and DRAM,.
Recently released circuit-related FTRs look at Phased
Lock Loop and Analog
to Digital Converter circuit implementations and include
actual
schematics of the circuit blocks and technical discussions
on their
differences.
Device manufacturers can benchmark what
the other
leading edge manufacturers are doing in production today.
They can
compare the available design options, such as the tradeoffs
between
memory cell size and manufacturing complexity and how this
relates
to cost. Fabless designers can assess the availability of a
given
type of technology and make better informed decisions as to
what
should be incorporated into their designs.
Get the information and understanding that
you
need, regarding the technical issues that are key to your
companies
success, with Chipworks’
Focused Technology Reviews.
|
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FSA
Suppliers Expo
October 3, 2002
Santa Clara Convention Center, Santa Clara, CA,
USA
The Fabless Semiconductor Association’s (FSA)
2002
Suppliers Expo is holding its annual premier event
dedicated
to bringing |
|
together suppliers, fabless companies,
IDM’s
and other organizations that play a vital role in the
semiconductor
industry of which Chipworks is proud to be part of. The goal
of the
Expo is to encourage partnerships with suppliers/vendors and
illustrate
what partnerships can accomplish within the industry. This
year’s
Expo features more than 125 exhibitors/suppliers, allowing
over 1,200
attendees, including many CEOs, presidents, purchasing
managers, supply
chain managers and engineers. This is your opportunity to
pursue the
latest services, products, and state-of-the-art technology
available.
Visit Chipworks at booth 112 and find out
what’s
new inside technology.
SEMICON Japan 2002 is celebrating its
26th
year and promises to deliver its usual exciting experience for
attendees.
This annual global event will be your
opportunity
to see the latest products and technology in the world.
Special
interest will focus on the launching of national projects
(ASUKA,
MIRAI and HALCA), the extensive study of MEMS, composition of
system
LSI, and e-manufacturing.
Chipworks is a proud participant of
SEMICON
Japan 2002.
|
Please
contact
Jennifer Kearns by e-mail at [EMAIL PROTECTED],
phone +1 613.829.0414 or fax +1 613.829.0515 for more
details on
Standard Report release dates and prices, or visit us
at
www.chipworks.com
for a list of all available reports. |
|
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In Europe
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