The following module was proposed for inclusion in the Module List:
modid: Verilog::Preproc DSLIP: Rd+Op description: Verilog language preprocessing userid: WSNYDER (Wilson Snyder) chapterid: 9 (Language_Interfaces) communities: similar: rationale: It's used by Verilog::Netlist, and is also usable as a stand-alone preprocessor or by perl applications just like a IO::File handle would be used. Already used by dozens of users. enteredby: WSNYDER (Wilson Snyder) enteredon: Mon Apr 8 14:02:08 2002 GMT The resulting entry would be: Verilog:: ::Preproc Rd+Op Verilog language preprocessing WSNYDER Thanks for registering, The Pause Team PS: The following links are only valid for module list maintainers: Registration form with editing capabilities: https://pause.perl.org/pause/authenquery?ACTION=add_mod&USERID=52100000_df40b33c2d5ff2ce&SUBMIT_pause99_add_mod_preview=1 Immediate (one click) registration: https://pause.perl.org/pause/authenquery?ACTION=add_mod&USERID=52100000_df40b33c2d5ff2ce&SUBMIT_pause99_add_mod_insertit=1