On 31/10/06, Paul Irofti <[EMAIL PROTECTED]> wrote:
I'm interested in the pipeline implementation of the sparc64 architecture, I
noticed there are quite a few sparc users on this list and I was wondering
if they could point me to a document describing the chip's architecture.
So far Google and Wikipedia didn't help much, all I was able to retrive were
some wierd docs from
(http://www.sparc.org/standards.html) that were poorly writen and quite
un-usefull, an OpenSPARC T1 pdf
(
http://opensparc-t1.sunsource.net/specs/UST1-UASuppl-current-draft-P-EXT.pdf)
that was more orientated twords development rather than hardware description
and some sort of presentation that was more related to performance with
multiple threads (
http://www.rz.rwth-aachen.de/computing/events/2006/sunhpc_2006/03_Tirumalai.pdf
).
So any specific links (maybe similar to intel documentation regarding it's
Pentium chips) are most apreciated.
I don't know if this covers what you want, but it might:
http://arstechnica.com/staff/carthage.ars/2006/10/16/5639
Upon second look, it DOESN'T seem to cover sparc, but it might be
helpful nontheless, so here goes:
http://arstechnica.com/staff/carthage.ars/2006/10/14/5617
