What's the biggest bottleneck when compiling the ports tree? I've got two machines available; the first is a P4-2.4, 1gb RAM, with two 15k disks on an Adaptec 39160 SCSI (ports tree on its own spindle), and a quad Xeon 500/2mb, 3gb EDO RAM, 5x 10k disks on an LSI RAID controller with 128mb cache.

I guess the questions boil down to: which benefits compiling ports more, disk or processor? Would compiling ports actually use four processors?

Reply via email to