On Mon 16 Nov 2015, Neil Roberts wrote: > There are currently a bunch of formats that behave strangely when > sampling the cleared color from the MCS buffer on SKL. They seem to > mostly be formats that don't have an alpha component, although it's > not all of them, and we haven't yet found anything in the specs which > would explain this. For now to be on the safe side this patch just > prevents fast clears for MSRTs on SKL altogether so that when fast > clears are eventually enabled it will only be for single-sampled > surfaces. The assumption is that clears are probably more likely to be > used in single-sampled applications anyway so we can at least get them > working and we can enable MSRTs later once we understand the problem > better. > > This patch should have no functional effect other than perhaps > receiving fewer perf_debug messages on SKL+. > > v2: Improve the commit message to avoid saying the patch disables fast > clears because it will be merged before fast clears are enabled > for any surfaces so it doesn't actually disable anything. > Reviewed-by: Ben Widawsky <benjamin.widaw...@intel.com> > --- > src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 7 +++++++ > 1 file changed, 7 insertions(+) > > diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c > b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c > index dc085ba..85576a8 100644 > --- a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c > +++ b/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c > @@ -524,6 +524,13 @@ brw_meta_fast_clear(struct brw_context *brw, struct > gl_framebuffer *fb, > if (brw->gen < 7) > clear_type = REP_CLEAR; > > + /* Certain formats have unresolved issues with sampling from the MCS > + * buffer on Gen9. This disables fast clears altogether for MSRTs until > + * we can figure out what's going on. > + */ > + if (brw->gen >= 9 && irb->mt->num_samples > 1) > + clear_type = REP_CLEAR; > + > if (irb->mt->fast_clear_state == INTEL_FAST_CLEAR_STATE_NO_MCS) > clear_type = REP_CLEAR;
Neil, do you have a bug open for this? Reviewed-by: Chad Versace <chad.vers...@intel.com> _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
