The subject says it all. This little series adds texture swizzle support
to nir_lower_tex and makes the i965 driver use that instead of its own
code. This approach has a few advantages:
1) It lets us share the swizzling code between both backends and with
anyone else who wants it.
2) It simplifies the work-arounds we have to do for RG32F textures because
everything is pre-swizzled by the time the backend sees it.
3) If someone wants to come along and implement texture write-masking in
the FS backend, they'll have an easier time of it. One of my
approaches to doing so was substantially complicated by the fact that,
thanks to the swizzle, the channels used that we can see from NIR don't
apply to the actual texturing instruction. Now that the swizzling is
done in NIR, this should be substantially simpler.
Jason Ekstrand (6):
nir/validate: Validated dests after sources
nir: Use instr/if_rewrite in nir_ssa_def_rewrite_uses
nir: Add a ssa_def_rewrite_uses_after helper
nir: Add a tex_instr_is_query helper
nir/lower_tex: Add support for lowering texture swizzle
i965: Use NIR for lowering texture swizzle
src/glsl/nir/nir.c | 63 ++++++++++++---
src/glsl/nir/nir.h | 40 ++++++++++
src/glsl/nir/nir_lower_tex.c | 67 ++++++++++++++++
src/glsl/nir/nir_validate.c | 18 ++---
src/mesa/drivers/dri/i965/brw_fs.h | 4 -
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 105 ++++---------------------
src/mesa/drivers/dri/i965/brw_nir.c | 14 +++-
src/mesa/drivers/dri/i965/brw_vec4.h | 4 -
src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 24 +++---
src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 93 ++--------------------
10 files changed, 215 insertions(+), 217 deletions(-)
--
2.5.0.400.gff86faf
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