This should prevent disparity between features Mesa and LLVM believe are supported by the CPU.
http://lists.freedesktop.org/archives/mesa-dev/2015-October/thread.html#96990 Tested on a i7-3720QM w/ LLVM 3.3 and 3.6. --- src/gallium/auxiliary/gallivm/lp_bld_misc.cpp | 34 ++++++++++++++++++++++++++- 1 file changed, 33 insertions(+), 1 deletion(-) diff --git a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp index 72fab8c..7073956 100644 --- a/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp +++ b/src/gallium/auxiliary/gallivm/lp_bld_misc.cpp @@ -498,6 +498,32 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT, } llvm::SmallVector<std::string, 1> MAttrs; + if (util_cpu_caps.has_sse) { + MAttrs.push_back("+sse"); + } + if (util_cpu_caps.has_sse2) { + MAttrs.push_back("+sse2"); + } + if (util_cpu_caps.has_sse3) { + MAttrs.push_back("+sse3"); + } + if (util_cpu_caps.has_ssse3) { + MAttrs.push_back("+ssse3"); + } + if (util_cpu_caps.has_sse4_1) { +#if HAVE_LLVM >= 0x0304 + MAttrs.push_back("+sse4.1"); +#else + MAttrs.push_back("+sse41"); +#endif + } + if (util_cpu_caps.has_sse4_2) { +#if HAVE_LLVM >= 0x0304 + MAttrs.push_back("+sse4.2"); +#else + MAttrs.push_back("+sse42"); +#endif + } if (util_cpu_caps.has_avx) { /* * AVX feature is not automatically detected from CPUID by the X86 target @@ -509,8 +535,14 @@ lp_build_create_jit_compiler_for_module(LLVMExecutionEngineRef *OutJIT, if (util_cpu_caps.has_f16c) { MAttrs.push_back("+f16c"); } - builder.setMAttrs(MAttrs); + if (util_cpu_caps.has_avx2) { + MAttrs.push_back("+avx2"); + } + } + if (util_cpu_caps.has_altivec) { + MAttrs.push_back("+altivec"); } + builder.setMAttrs(MAttrs); #if HAVE_LLVM >= 0x0305 StringRef MCPU = llvm::sys::getHostCPUName(); -- 2.1.4 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
