On Wed, 2015-10-21 at 00:50 -0700, Matt Turner wrote: > On Tue, Oct 20, 2015 at 11:46 PM, Iago Toral <ito...@igalia.com> wrote: > > On Mon, 2015-10-19 at 21:09 -0700, Matt Turner wrote: > >> Documentation is sparse, but it appears to have existed on G45 and ILK > >> as a second bit extension of the mask_control field. Setting the pair of > >> bits to 0b11 enables "NoCMask". > > > > It shows up in the compacted table for g45 in bit 23, but bit 28 of > > regular instructions seems to be unused as per this document: > > https://01.org/sites/default/files/documentation/g45_vol_4_subsystem_0.pdf > > Page 400 of the PDF says it's located at bit 28 in the uncompacted > instruction word. > > Indeed, it looks like "Table 13-2. GENX Instruction Format" is missing it. > > > There are references to that extension bit in the docs though so I guess > > this is another documentation bug? Of course ILK does not have any > > mentions to this, but I guess that is not surprising. > > > > I have to ask though, how did you find/verify this? :) > > I didn't :) > > The story is that I'm writing an assembly validation pass, and in > checking accumulator-related restrictions I noticed that the MACH > instruction wasn't setting the AccWrEn bit on Gen4/5... which turns > out to be because that bit didn't exist on Gen4/5 and in its place is > his weird MaskControlEx field. :) > > I've got a snapshot of the internal BSpec as PDFs that still has > useful Ironlake information, and that's where the "NoCMask" > information comes from. The G45 docs simply say that 0b11 is > "Reserved", but it's unclear whether that's actually true or if they > made *another* mistake. :) > > I doubt we'll ever care to determine whether it exists on G45. Curro > and I think the NoCMask setting is probably for use by loop condition > instructions in a do-while loop with a continue. E.g., > > DO > ... > <generate flag> > (+f0) CONT > ... > ADD count, count, 1 { NoCMask } > CMP.GE null, count, 42 { NoCMask } > (-f0) WHILE > > Otherwise, implementing such a thing would be more annoying. > Fortunately (or otherwise) we convert do-while loops into something > more manageable in the AST->GLSL IR translation. >
I see, thanks for the detailed explanation Matt! This patch is: Reviewed-by: Iago Toral Quiroga <ito...@igalia.com> Iago _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
