Am 13.10.2015 um 19:59 schrieb Adam Jackson: > On Mon, 2015-10-12 at 22:55 +0200, Roland Scheidegger wrote: > >> I don't know that looks like a generic string you're getting back. >> x86-64 IIRC implies sse2 in llvm, but not the other sseX flags (and if >> we detected sse41 we're going to use intrinsics for these, which then >> may not be available in llvm _potentially_ (I'm really not sure here as >> this code changed, and mesa generally is only adapted to such changes >> once it breaks..., but the string here will be something less generic >> like "ivybridge" usually on real hw). > > This was the clue I needed, SSE4.1 intrinsics die because llvm doesn't > think they're legal for the target, because llvm 3.6 doesn't know about > broadwell or skylake so they just appear as generic. Adding their > model numbers to the Haswell path seems to do the trick (since > apparently Haswell Pentium has the same property re AVX). > > - ajax >
I think though it's still possible to tell llvm that these are legal by setting mattr's, so they'd work regardless the cpu detected. So we could/should probably fix this in mesa too. Albeit as mentioned the mechanism there changed somewhat over time in llvm. Roland _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
