On Mon, Oct 05, 2015 at 12:01:25PM -0700, Jordan Justen wrote: > On 2015-10-05 11:55:57, Matt Turner wrote: > > On Thu, Oct 1, 2015 at 11:20 AM, Jordan Justen > > <jordan.l.jus...@intel.com> wrote: > > > On 2015-10-01 10:11:33, Matt Turner wrote: > > >> According to the Intel Software Development Manual: > > > > > > How about a more specific doc location? > > > > > > According to the Intel Software Development Manual (Volume 1: Basic > > > Architecture, 12.10.3 Streaming Load Hint Instruction): > > > > Sure. Thanks for looking that up for me. > > > > >> Streaming loads may be weakly ordered and may appear to software to > > >> execute out of order with respect to other memory operations. > > >> Software must explicitly use fences (e.g. MFENCE) if it needs to > > >> preserve order among streaming loads or between streaming loads and > > >> other memory operations. > > > > > > Does this mean we need a mfence following the load as well? > > > > I didn't think so, and Joseph has confirmed. > > > > Can I consider this a Reviewed-by? > > Reviewed-by: Jordan Justen <jordan.l.jus...@intel.com>
I believe you only need a SFENCE here not a full MFENCE. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
