From: Marek Olšák <marek.ol...@amd.com>
This can cause incorrect address calculations and hangs.
Cc: mesa-sta...@lists.freedesktop.org
---
src/gallium/drivers/radeonsi/si_descriptors.c | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c
b/src/gallium/drivers/radeonsi/si_descriptors.c
index b07ab3b..0ced6c3 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -619,11 +619,14 @@ void si_set_ring_buffer(struct pipe_context *ctx, uint
shader, uint slot,
S_008F0C_DST_SEL_Z(V_008F0C_SQ_SEL_Z) |
S_008F0C_DST_SEL_W(V_008F0C_SQ_SEL_W) |
S_008F0C_NUM_FORMAT(V_008F0C_BUF_NUM_FORMAT_FLOAT) |
- S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32) |
S_008F0C_ELEMENT_SIZE(element_size) |
S_008F0C_INDEX_STRIDE(index_stride) |
S_008F0C_ADD_TID_ENABLE(add_tid);
+ /* If ADD_TID_ENABLE is set, DATA_FORMAT specifies STRIDE bits
[14:17] */
+ if (sctx->b.chip_class >= VI && !add_tid)
+ desc[3] |=
S_008F0C_DATA_FORMAT(V_008F0C_BUF_DATA_FORMAT_32);
+
pipe_resource_reference(&buffers->buffers[slot], buffer);
radeon_add_to_buffer_list(&sctx->b, &sctx->b.rings.gfx,
(struct r600_resource*)buffer,
--
2.1.4
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