Samuel Iglesias Gonsalvez <sigles...@igalia.com> writes:
> Fix OpenGL ES 3.1 conformance tests: advanced-readWrite-case1-vsfs
> and advanced-matrix-vsfs.
>
> Signed-off-by: Samuel Iglesias Gonsalvez <sigles...@igalia.com>
> Tested-by: Tapani Pälli <tapani.pa...@intel.com>
> Cc: Francisco Jerez <curroje...@riseup.net>
> ---
> src/mesa/drivers/dri/i965/brw_vec4_nir.cpp | 9 +++++++++
> 1 file changed, 9 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> index 175d92b..5c418fb 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_nir.cpp
> @@ -654,6 +654,15 @@ vec4_visitor::nir_emit_intrinsic(nir_intrinsic_instr
> *instr)
> break;
> }
>
> + case nir_intrinsic_memory_barrier: {
> + const vec4_builder bld =
> + vec4_builder(this).at_end().annotate(current_annotation, base_ir);
> + const src_reg tmp = src_reg(this, glsl_type::uint_type);
The temporary register you pass to the MEMORY_FENCE instruction should
be at least regs_written VGRFs, you could use
'bld.vgrf(BRW_REGISTER_TYPE_UD, 2)' instead.
> + bld.emit(SHADER_OPCODE_MEMORY_FENCE, dest, tmp)
MEMORY_FENCE only takes a destination (which should be tmp rather than
dest) and no source registers.
> + ->regs_written = 2;
> + break;
> + }
> +
> default:
> unreachable("Unknown intrinsic");
> }
> --
> 2.1.4
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