If gen9_use_linear_1d_layout() returns true, we discards the align_w
computed earlier and use fixed align_w = 64 in gen9_miptree_layout_1d().
So, avoid computing align_w when not required.
V2: Rebased on master.
Signed-off-by: Anuj Phogat <anuj.pho...@gmail.com>
---
Bump for the series.
src/mesa/drivers/dri/i965/brw_tex_layout.c | 20 +++++++++++---------
1 file changed, 11 insertions(+), 9 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 268b995..dcb0989 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -776,15 +776,17 @@ intel_miptree_set_alignment(struct brw_context *brw,
} else if (mt->format == MESA_FORMAT_S_UINT8) {
mt->align_w = 8;
mt->align_h = brw->gen >= 7 ? 8 : 4;
- } else if (brw->gen >= 9 && mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) {
- /* XY_FAST_COPY_BLT doesn't support horizontal alignment < 32 or
- * vertical alignment < 64. */
- mt->align_w = MAX2(tr_mode_horizontal_texture_alignment(brw, mt), 32);
- mt->align_h = MAX2(tr_mode_vertical_texture_alignment(brw, mt), 64);
- } else {
- mt->align_w =
- intel_horizontal_texture_alignment_unit(brw, mt, layout_flags);
- mt->align_h = intel_vertical_texture_alignment_unit(brw, mt);
+ } else if (!gen9_use_linear_1d_layout(brw, mt)) {
+ if (mt->tr_mode != INTEL_MIPTREE_TRMODE_NONE) {
+ /* XY_FAST_COPY_BLT doesn't support horizontal alignment < 32 or
+ * vertical alignment < 64. */
+ mt->align_w = MAX2(tr_mode_horizontal_texture_alignment(brw, mt), 32);
+ mt->align_h = MAX2(tr_mode_vertical_texture_alignment(brw, mt), 64);
+ } else {
+ mt->align_w =
+ intel_horizontal_texture_alignment_unit(brw, mt, layout_flags);
+ mt->align_h = intel_vertical_texture_alignment_unit(brw, mt);
+ }
}
}
--
2.4.3
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