In order to accomodate 16x MSAA, the starting sample pair index is now
3 bits rather than 2 on SKL+.
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 82f49b4..bd9bcdd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1300,9 +1300,16 @@ fs_visitor::emit_sampleid_setup()
* are sample 1 of subspan 0; the third group is sample 0 of
* subspan 1, and finally sample 1 of subspan 1.
*/
+
+ /* SKL+ has an extra bit for the Starting Sample Pair Index to
+ * accomodate 16x MSAA.
+ */
+ unsigned sspi_bits = devinfo->gen >= 9 ? 3 : 2;
+ unsigned sspi_mask = ((1 << sspi_bits) - 1) << 6;
+
abld.exec_all()
.AND(t1, fs_reg(retype(brw_vec1_grf(0, 0), BRW_REGISTER_TYPE_UD)),
- fs_reg(0xc0));
+ fs_reg(sspi_mask));
abld.exec_all().SHR(t1, t1, fs_reg(5));
/* This works for both SIMD8 and SIMD16 */
--
1.9.3
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