On Wed, Sep 16, 2015 at 2:07 PM, Rob Clark <robdcl...@gmail.com> wrote:
> From: Rob Clark <robcl...@freedesktop.org>
>
> Some hardware, such as adreno a3xx, supports txp on some but not all
> sampler types. In this case we want more fine grained control over
> which texture projectors get lowered.
I mentioned this on IRC, but should probably say it here too -- a3xx
doesn't actually need this. The tex-miplevel-selection test was being
picky, Iago changed it up in commit 181c264956 since Intel was having
similar troubles. As I recall, sam.3d.p worked fine on my a320 with
that change, but it was quite a while ago, and should be re-checked.
-ilia
>
> Signed-off-by: Rob Clark <robcl...@freedesktop.org>
> ---
> src/glsl/nir/nir.h | 2 +-
> src/glsl/nir/nir_lower_tex_projector.c | 31 +++++++++++++++++++++++--------
> src/mesa/drivers/dri/i965/brw_nir.c | 2 +-
> 3 files changed, 25 insertions(+), 10 deletions(-)
>
> diff --git a/src/glsl/nir/nir.h b/src/glsl/nir/nir.h
> index 284fccd..9d47001 100644
> --- a/src/glsl/nir/nir.h
> +++ b/src/glsl/nir/nir.h
> @@ -1830,7 +1830,7 @@ void nir_lower_samplers(nir_shader *shader,
> const struct gl_shader_program *shader_program);
>
> void nir_lower_system_values(nir_shader *shader);
> -void nir_lower_tex_projector(nir_shader *shader);
> +void nir_lower_tex_projector(nir_shader *shader, unsigned lower_txp);
> void nir_lower_idiv(nir_shader *shader);
>
> void nir_lower_clip_vs(nir_shader *shader, unsigned ucp_enables);
> diff --git a/src/glsl/nir/nir_lower_tex_projector.c
> b/src/glsl/nir/nir_lower_tex_projector.c
> index 11fcd61..ce20956 100644
> --- a/src/glsl/nir/nir_lower_tex_projector.c
> +++ b/src/glsl/nir/nir_lower_tex_projector.c
> @@ -30,6 +30,11 @@
> #include "nir.h"
> #include "nir_builder.h"
>
> +typedef struct {
> + nir_builder b;
> + unsigned lower_txp;
> +} lower_tex_state;
> +
> static void
> project_src(nir_builder *b, nir_tex_instr *tex)
> {
> @@ -109,37 +114,47 @@ project_src(nir_builder *b, nir_tex_instr *tex)
> static bool
> nir_lower_tex_projector_block(nir_block *block, void *void_state)
> {
> - nir_builder *b = void_state;
> + lower_tex_state *state = void_state;
> + nir_builder *b = &state->b;
>
> nir_foreach_instr_safe(block, instr) {
> if (instr->type != nir_instr_type_tex)
> continue;
>
> nir_tex_instr *tex = nir_instr_as_tex(instr);
> + bool lower_txp = !!(state->lower_txp & (1 << tex->sampler_dim));
> +
> + if (lower_txp)
> + project_src(b, tex);
>
> - project_src(b, tex);
> }
>
> return true;
> }
>
> static void
> -nir_lower_tex_projector_impl(nir_function_impl *impl)
> +nir_lower_tex_projector_impl(nir_function_impl *impl, lower_tex_state *state)
> {
> - nir_builder b;
> - nir_builder_init(&b, impl);
> + nir_builder_init(&state->b, impl);
>
> - nir_foreach_block(impl, nir_lower_tex_projector_block, &b);
> + nir_foreach_block(impl, nir_lower_tex_projector_block, state);
>
> nir_metadata_preserve(impl, nir_metadata_block_index |
> nir_metadata_dominance);
> }
>
> +/**
> + * lower_txp:
> + * bitmask of (1 << GLSL_SAMPLER_DIM_x) to control for which
> + * sampler types a texture projector is lowered.
> + */
> void
> -nir_lower_tex_projector(nir_shader *shader)
> +nir_lower_tex_projector(nir_shader *shader, unsigned lower_txp)
> {
> + lower_tex_state state;
> + state.lower_txp = lower_txp;
> nir_foreach_overload(shader, overload) {
> if (overload->impl)
> - nir_lower_tex_projector_impl(overload->impl);
> + nir_lower_tex_projector_impl(overload->impl, &state);
> }
> }
> diff --git a/src/mesa/drivers/dri/i965/brw_nir.c
> b/src/mesa/drivers/dri/i965/brw_nir.c
> index f326b23..2a924bb 100644
> --- a/src/mesa/drivers/dri/i965/brw_nir.c
> +++ b/src/mesa/drivers/dri/i965/brw_nir.c
> @@ -96,7 +96,7 @@ brw_create_nir(struct brw_context *brw,
> nir_lower_global_vars_to_local(nir);
> nir_validate_shader(nir);
>
> - nir_lower_tex_projector(nir);
> + nir_lower_tex_projector(nir, ~0);
> nir_validate_shader(nir);
>
> nir_normalize_cubemap_coords(nir);
> --
> 2.4.3
>
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