[Mesa-dev] [PATCH v2] nv50, nvc0: detect underlying resource changes and update tic

[Ilia Mirkin]

When updating texture buffers, we might end up replacing the whole
buffer. Check that the tic address matches the resource address, and if
not, update the tic and reupload it.

This fixes:
  arb_direct_state_access-texture-buffer
  arb_texture_buffer_object-data-sync

Signed-off-by: Ilia Mirkin <imir...@alum.mit.edu>
Cc: "11.0" <mesa-sta...@lists.freedesktop.org>
---

This seems like a better version of the previous attempt to fix this,
since it no longer relies on the sampler view being bound. And it
keeps the tic update logic along with the other tic logic.

 src/gallium/drivers/nouveau/nv50/nv50_tex.c | 18 ++++++++++++++++++
 src/gallium/drivers/nouveau/nvc0/nvc0_tex.c | 19 +++++++++++++++++++
 2 files changed, 37 insertions(+)

diff --git a/src/gallium/drivers/nouveau/nv50/nv50_tex.c 
b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
index fc6374d..70f8928 100644
--- a/src/gallium/drivers/nouveau/nv50/nv50_tex.c
+++ b/src/gallium/drivers/nouveau/nv50/nv50_tex.c
@@ -221,6 +221,23 @@ nv50_create_texture_view(struct pipe_context *pipe,
    return &view->pipe;
 }
 
+static void
+nv50_update_tic(struct nv50_context *nv50, struct nv50_tic_entry *tic,
+                struct nv04_resource *res)
+{
+   if (res->base.target != PIPE_BUFFER)
+      return;
+   if (tic->tic[1] == (uint32_t)res->address &&
+       (tic->tic[2] & 0xff) == res->address >> 32)
+      return;
+
+   nv50_screen_tic_unlock(nv50->screen, tic);
+   tic->id = -1;
+   tic->tic[1] = res->address;
+   tic->tic[2] &= 0xffffff00;
+   tic->tic[2] |= res->address >> 32;
+}
+
 static bool
 nv50_validate_tic(struct nv50_context *nv50, int s)
 {
@@ -240,6 +257,7 @@ nv50_validate_tic(struct nv50_context *nv50, int s)
          continue;
       }
       res = &nv50_miptree(tic->pipe.texture)->base;
+      nv50_update_tic(nv50, tic, res);
 
       if (tic->id < 0) {
          tic->id = nv50_screen_tic_alloc(nv50->screen, tic);
diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c 
b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
index d19082e..0174407 100644
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_tex.c
@@ -226,6 +226,23 @@ nvc0_create_texture_view(struct pipe_context *pipe,
    return &view->pipe;
 }
 
+static void
+nvc0_update_tic(struct nvc0_context *nvc0, struct nv50_tic_entry *tic,
+                struct nv04_resource *res)
+{
+   if (res->base.target != PIPE_BUFFER)
+      return;
+   if (tic->tic[1] == (uint32_t)res->address &&
+       (tic->tic[2] & 0xff) == res->address >> 32)
+      return;
+
+   nvc0_screen_tic_unlock(nvc0->screen, tic);
+   tic->id = -1;
+   tic->tic[1] = res->address;
+   tic->tic[2] &= 0xffffff00;
+   tic->tic[2] |= res->address >> 32;
+}
+
 static bool
 nvc0_validate_tic(struct nvc0_context *nvc0, int s)
 {
@@ -247,6 +264,7 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
          continue;
       }
       res = nv04_resource(tic->pipe.texture);
+      nvc0_update_tic(nvc0, tic, res);
 
       if (tic->id < 0) {
          tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
@@ -313,6 +331,7 @@ nve4_validate_tic(struct nvc0_context *nvc0, unsigned s)
          continue;
       }
       res = nv04_resource(tic->pipe.texture);
+      nvc0_update_tic(nvc0, tic, res);
 
       if (tic->id < 0) {
          tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
-- 
2.4.6

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