On 09/09/2015 06:59 AM, Marius Predut wrote: > On PNV platform, for 1 pixel line thickness or less, > the general anti-aliasing algorithm gives up, and a garbage line is generated. > Setting a Line Width of 0.0 specifies the rasterization > of the "thinnest" (one-pixel-wide), non-antialiased lines. > Lines rendered with zero Line Width are rasterized using > Grid Intersection Quantization rules as specified by bspec G45: Volume 2: > 3D/Media, > 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section. > > This patch follow the same rules as patches fixing the > https://bugs.freedesktop.org/show_bug.cgi?id=28832 > bug. > > v1: Eduardo Lima Mitev: Wrong indentation inside the if clause. > > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90367 > > Signed-off-by: Marius Predut <marius.pre...@intel.com> > --- > src/mesa/drivers/dri/i915/i915_state.c | 15 +++++++++++++++ > 1 file changed, 15 insertions(+) > > diff --git a/src/mesa/drivers/dri/i915/i915_state.c > b/src/mesa/drivers/dri/i915/i915_state.c > index 4c83073..ebb4e9a 100644 > --- a/src/mesa/drivers/dri/i915/i915_state.c > +++ b/src/mesa/drivers/dri/i915/i915_state.c > @@ -599,6 +599,21 @@ i915LineWidth(struct gl_context * ctx, GLfloat widthf) > > width = (int) (widthf * 2); > width = CLAMP(width, 1, 0xf); > + > + if (ctx->Line.Width < 1.5 || widthf < 1.5) { > + /* For 1 pixel line thickness or less, the general > + * anti-aliasing algorithm gives up, and a garbage line is > + * generated. Setting a Line Width of 0.0 specifies the > + * rasterization of the "thinnest" (one-pixel-wide), > + * non-antialiased lines. > + * > + * Lines rendered with zero Line Width are rasterized using > + * Grid Intersection Quantization rules as specified by > + * bspec G45: Volume 2: 3D/Media,
Eh... Isn't G45 actually i965-class hardware? GEN4.5, right? I don't see how a GEN4 bspec reference is useful (or correct?) in the GEN3 driver. I think you want "2.8.4.1 Zero-Width (Cosmetic) Line Rasterization" from volume 1f of the GEN3 docs. I looked at section 2.8.4.3 Anti-aliased Line Rasterization of volume 1f of the GEN3 docs that I have. I don't see any mention of this restriction. Is it documented anywhere? It also seems like this will affect non-antialised wide lines. Is that correct? > + * 7.3.13.1 Zero-Width (Cosmetic) Line Rasterization section > + */ > + width = 0; > + } > lis4 |= width << S4_LINE_WIDTH_SHIFT; > > if (lis4 != i915->state.Ctx[I915_CTXREG_LIS4]) { _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev