On Thu, Jun 18, 2015 at 03:41:50PM -0700, Kenneth Graunke wrote:
> On Wednesday, June 17, 2015 03:50:13 PM Ben Widawsky wrote:
> > On gen9+ MOCS is an index into a table. It is 7 bits, and AFAICT, bit 0 is
> > for
> > doing encrypted reads.
> >
> > I don't recall how I decided to do this for BXT. I don't know this patch was
> > ever needed, since it seems nothing is broken today on SKL. Furthermore,
> > this
> > patch may no longer be needed because of the ongoing changes with MOCS
> > setup. It
> > is what is being used/tested, so it's included in the series.
> >
> > The chosen values are the old values left shifted. That was also an
> > arbitrary
> > choice.
> >
> > Cc: Francisco Jerez <curroje...@riseup.net>
> > Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
> > ---
> > src/mesa/drivers/dri/i965/brw_defines.h | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/src/mesa/drivers/dri/i965/brw_defines.h
> > b/src/mesa/drivers/dri/i965/brw_defines.h
> > index bfcc442..5358edc 100644
> > --- a/src/mesa/drivers/dri/i965/brw_defines.h
> > +++ b/src/mesa/drivers/dri/i965/brw_defines.h
> > @@ -2495,8 +2495,8 @@ enum brw_wm_barycentric_interp_mode {
> > * cache settings. We still use only either write-back or write-through;
> > and
> > * rely on the documented default values.
> > */
> > -#define SKL_MOCS_WB 9
> > -#define SKL_MOCS_WT 5
> > +#define SKL_MOCS_WB 0x12
> > +#define SKL_MOCS_WT 0xa
>
>
> Yeah, it looks like Kristian made these defines the indices into the
> table, but may have missed that the MOCS field puts that table index in
> [6:1] and bit 0 is something else.
>
> So shifting left by 1 seems like a good plan. Perhaps write it as
>
> #define SKL_MOCS_WB (0b000101 << 1)
> #define SKL_MOCS_WT (0b001001 << 1)
>
You meant this, right (you reversed it, I think)?
#define SKL_MOCS_WB (0b001001 << 1)
#define SKL_MOCS_WT (0b000101 << 1)
> so the index value is written like it is in the documentation, and the
> shift 1 indicates moving it into the right place for MOCS?
>
> Either way,
> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
>
> Incidentally...the WT value (index 5) appears to skip eLLC - the target
> cache is 01b = "LLC only". That doesn't seem desirable. We probably
> want index 6 instead (0b000110 << 1) which uses both LLC and eLLC.
>
> That said, we shouldn't ever be using WT in the driver - we want to use
> the PTE value. (krh even added a FINISHME comment to that effect.)
>
> I think a proper value for that would be:
> #define SKL_MOCS_PTE (0b000010 << 1)
> (Default: 0b000010,
> LeCC = 0x00 - use cacheability controls from page table / ...
> TC = LLC/eLLC allowed)
>
> We could either fix the _WT define or just delete it.
>
> >
> > #define MEDIA_VFE_STATE 0x7000
> > /* GEN7 DW2, GEN8+ DW3 */
> >
I'll get on this too. Thanks.
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