This is required for ARB_gpu_shader5 support in softpipe.
Signed-off-by: Dave Airlie <airl...@redhat.com>
---
src/gallium/auxiliary/tgsi/tgsi_exec.c | 23 ++++++++++++++++++++++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c
b/src/gallium/auxiliary/tgsi/tgsi_exec.c
index f080385..a2f52f0 100644
--- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
+++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
@@ -2032,14 +2032,35 @@ exec_tex(struct tgsi_exec_machine *mach,
const struct tgsi_full_instruction *inst,
uint modifier, uint sampler)
{
- const uint unit = inst->Src[sampler].Register.Index;
const union tgsi_exec_channel *args[5], *proj = NULL;
union tgsi_exec_channel r[5];
enum tgsi_sampler_control control = tgsi_sampler_lod_none;
uint chan;
+ uint unit;
int8_t offsets[3];
int dim, shadow_ref, i;
+
+ if (inst->Src[sampler].Register.Indirect) {
+ const struct tgsi_full_src_register *reg = &inst->Src[sampler];
+ union tgsi_exec_channel indir_index, index2;
+
+ index2.i[0] =
+ index2.i[1] =
+ index2.i[2] =
+ index2.i[3] = reg->Indirect.Index;
+
+ fetch_src_file_channel(mach,
+ 0,
+ reg->Indirect.File,
+ reg->Indirect.Swizzle,
+ &index2,
+ &ZeroVec,
+ &indir_index);
+ unit = inst->Src[sampler].Register.Index + indir_index.i[0];
+ } else {
+ unit = inst->Src[sampler].Register.Index;
+ }
/* always fetch all 3 offsets, overkill but keeps code simple */
fetch_texel_offsets(mach, inst, offsets);
--
2.1.0
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