v2:
* Do more work at the visitor level. g0 is loaded and sent to the
generator now.
Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
---
src/mesa/drivers/dri/i965/brw_fs.h | 1 +
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 19 +++++++++++++++++++
2 files changed, 20 insertions(+)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 4e17d44..b1e65cd 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -387,6 +387,7 @@ public:
bool use_2nd_half = false);
void emit_fb_writes();
void emit_urb_writes();
+ void emit_cs_terminate();
void emit_shader_time_begin();
void emit_shader_time_end();
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index 11f38c2..ba8b811 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -4154,6 +4154,25 @@ fs_visitor::resolve_ud_negate(fs_reg *reg)
*reg = temp;
}
+void
+fs_visitor::emit_cs_terminate()
+{
+ assert(brw->gen >= 7);
+
+ /* We are getting the thread ID from the compute shader header */
+ assert(stage == MESA_SHADER_COMPUTE);
+
+ /* Copy g0 for the message payload */
+ struct brw_reg g0 = retype(brw_vec8_grf(0, 0), BRW_REGISTER_TYPE_UD);
+ fs_reg payload = fs_reg(GRF, alloc.allocate(1), BRW_REGISTER_TYPE_UD);
+ fs_inst *inst = emit(MOV(payload, g0));
+ inst->force_writemask_all = true;
+
+ /* Send a message to the thread spawner to terminate the thread. */
+ inst = emit(CS_OPCODE_CS_TERMINATE, reg_undef, payload);
+ inst->eot = true;
+}
+
/**
* Resolve the result of a Gen4-5 CMP instruction to a proper boolean.
*
--
2.1.4
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