On Wednesday, March 25, 2015 04:52:46 PM Ben Widawsky wrote: > The PMA depth stall must be enabled (optimization turned off) under certain > circumstances on gen8. This was supposedly fixed for Gen9, which means we do not > need to check, or toggle the state. The hardware is supposed to enable the > hardware optimization by default, unlike BDW, so we also don't need to set it at > init. For whatever reason this improves stability on ETQW with the bug mentioned > below. > > TODO: This patch still needs to be tested on a full piglit run. > > References: https://bugs.freedesktop.org/show_bug.cgi?id=89039 (doesn't fix) > Cc: Anuj Phogat <anuj.pho...@intel.com> > Cc: Eero Tamminen <eero.t.tammi...@intel.com> > Signed-off-by: Ben Widawsky <b...@bwidawsk.net> > --- > src/mesa/drivers/dri/i965/gen8_depth_state.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/src/mesa/drivers/dri/i965/gen8_depth_state.c b/src/mesa/drivers/dri/i965/gen8_depth_state.c > index c6494c9..3d126cf 100644 > --- a/src/mesa/drivers/dri/i965/gen8_depth_state.c > +++ b/src/mesa/drivers/dri/i965/gen8_depth_state.c > @@ -368,6 +368,10 @@ static void > gen8_emit_pma_stall_workaround(struct brw_context *brw) > { > uint32_t bits = 0; > + > + if (brw->gen >= 9) > + return; > + > if (pma_fix_enable(brw)) > bits |= GEN8_HIZ_NP_PMA_FIX_ENABLE | GEN8_HIZ_NP_EARLY_Z_FAILS_DISABLE; > > @@ -400,7 +404,8 @@ gen8_hiz_exec(struct brw_context *brw, struct intel_mipmap_tree *mt, > return; > > /* Disable the PMA stall fix since we're about to do a HiZ operation. */ > - write_pma_stall_bits(brw, 0); > + if (brw->gen == 8) > + write_pma_stall_bits(brw, 0); > > assert(mt->first_level == 0); > assert(mt->logical_depth0 >= 1); >
Thanks for fixing this. Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
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