Hello, I've run into a situation where a3xx hardware does not natively support Z32F_S8 (interleaved). However it will happily support Z32F and S8 separately (and at the same time). Haven't looked at how a4xx handles this, but wouldn't be surprised if it were the same.
One way to do this is to expose the Z32F_X24S8 format in the driver, but internally just store the two sets of data separately. Then add hooks to the transfer logic to interleave/deinterleave the data on transfer in/out. This seems hacky. Another approach is to teach gallium about split depth/stencil buffers, i.e. adding a pipe_surface *sbuf next to the zsbuf. Then, guarded by a PIPE_CAP, the st would be able to make use of it. Both for binding separate depth/stencil textures (e.g. Z16 + S8), as well as to create adapters for this situation. I guess it'd still be a bit of a hack, but at least it would be reusable by other hw. Is there any other hw out there that would need this? Any preferences on how I should approach it? FTR, Z32F_X24S8 is needed for both GL3 (ARB_depth_buffer_float) and GLES3. Cheers, -ilia _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
