The original patch from Curro was based on something that is not
present in the master yet. This patch tries to mimick the logic on
top master.
I wanted to see if could separate the building of the descriptor
instruction from building of the send instruction. This logic now
allows the caller to construct any kind of sequence of instructions
filling in the descriptor before giving it to the send instruction
builder.
This is only compile tested. Curro, how would you feel about this
sort of approach? I apologise for muddying the waters again but I
wasn't entirely comfortable with the logic and wanted to try to
something else.
I believe patch number five should go nicely on top of this as
the descriptor instruction could be followed by (or preceeeded by)
any additional instructions modifying the descriptor register
before the actual send instruction.
Signed-off-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
---
src/mesa/drivers/dri/i965/brw_eu.h | 17 +++++--
src/mesa/drivers/dri/i965/brw_eu_emit.c | 53 ++++++++++++++++------
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 58 ++++++------------------
src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 38 ++++------------
4 files changed, 75 insertions(+), 91 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
b/src/mesa/drivers/dri/i965/brw_eu.h
index 736c54b..82570f5 100644
--- a/src/mesa/drivers/dri/i965/brw_eu.h
+++ b/src/mesa/drivers/dri/i965/brw_eu.h
@@ -205,11 +205,6 @@ void brw_set_sampler_message(struct brw_compile *p,
unsigned simd_mode,
unsigned return_format);
-void brw_set_indirect_send_descriptor(struct brw_compile *p,
- brw_inst *insn,
- unsigned sfid,
- struct brw_reg descriptor);
-
void brw_set_dp_read_message(struct brw_compile *p,
brw_inst *insn,
unsigned binding_table_index,
@@ -242,6 +237,18 @@ void brw_urb_WRITE(struct brw_compile *p,
unsigned offset,
unsigned swizzle);
+struct brw_inst *
+brw_build_indirect_message_descr(struct brw_compile *p,
+ struct brw_reg dst,
+ struct brw_reg src);
+
+struct brw_inst *
+brw_send_indirect_message(struct brw_compile *p,
+ unsigned sfid,
+ struct brw_reg dst,
+ struct brw_reg payload,
+ struct brw_reg desc);
+
void brw_ff_sync(struct brw_compile *p,
struct brw_reg dest,
unsigned msg_reg_nr,
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 6f29468..cd0d199 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -772,21 +772,6 @@ brw_set_sampler_message(struct brw_compile *p,
}
}
-void brw_set_indirect_send_descriptor(struct brw_compile *p,
- brw_inst *insn,
- unsigned sfid,
- struct brw_reg descriptor)
-{
- /* Only a0.0 may be used as SEND's descriptor operand. */
- assert(descriptor.file == BRW_ARCHITECTURE_REGISTER_FILE);
- assert(descriptor.type == BRW_REGISTER_TYPE_UD);
- assert(descriptor.nr == BRW_ARF_ADDRESS);
- assert(descriptor.subnr == 0);
-
- brw_set_message_descriptor(p, insn, sfid, 0, 0, false, false);
- brw_set_src1(p, insn, descriptor);
-}
-
static void
gen7_set_dp_scratch_message(struct brw_compile *p,
brw_inst *inst,
@@ -2495,6 +2480,44 @@ void brw_urb_WRITE(struct brw_compile *p,
swizzle);
}
+struct brw_inst *
+brw_build_indirect_message_descr(struct brw_compile *p,
+ struct brw_reg dst,
+ struct brw_reg src)
+{
+ assert(dst.type == BRW_REGISTER_TYPE_UD);
+ assert(src.type == BRW_REGISTER_TYPE_UD);
+
+ brw_push_insn_state(p);
+ brw_set_default_access_mode(p, BRW_ALIGN_1);
+ brw_set_default_mask_control(p, BRW_MASK_DISABLE);
+ brw_set_default_predicate_control(p, BRW_PREDICATE_NONE);
+
+ struct brw_inst *setup = brw_OR(p, dst, src, brw_imm_ud(0));
+
+ brw_pop_insn_state(p);
+
+ return setup;
+}
+
+struct brw_inst *
+brw_send_indirect_message(struct brw_compile *p,
+ unsigned sfid,
+ struct brw_reg dst,
+ struct brw_reg payload,
+ struct brw_reg desc)
+{
+ const struct brw_context *brw = p->brw;
+ struct brw_inst *send = next_insn(p, BRW_OPCODE_SEND);
+
+ brw_set_src1(p, send, desc);
+ brw_set_dest(p, send, retype(dst, BRW_REGISTER_TYPE_UD));
+ brw_set_src0(p, send, retype(payload, BRW_REGISTER_TYPE_UD));
+ brw_inst_set_sfid(brw, send, sfid);
+
+ return send;
+}
+
static int
brw_find_next_block_end(struct brw_compile *p, int start_offset)
{
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 02ea3b6..38419cb 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -751,9 +751,10 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
brw_AND(p, addr, addr, brw_imm_ud(0x0ff));
brw_OR(p, addr, addr, temp);
- /* a0.0 |= <descriptor> */
- brw_inst *insn_or = brw_next_insn(p, BRW_OPCODE_OR);
- brw_set_sampler_message(p, insn_or,
+ /* dst = send(offset, a0.0 | <descriptor>) */
+ struct brw_reg descr = retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD);
+ brw_inst *descr_inst = brw_build_indirect_message_descr(p, descr, addr);
+ brw_set_sampler_message(p, descr_inst,
0 /* surface */,
0 /* sampler */,
msg_type,
@@ -762,17 +763,7 @@ fs_generator::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src
inst->header_present /* header */,
simd_mode,
return_format);
- brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
- brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
- brw_set_src0(p, insn_or, addr);
- brw_set_dest(p, insn_or, addr);
-
-
- /* dst = send(offset, a0.0) */
- brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
- brw_set_dest(p, insn_send, dst);
- brw_set_src0(p, insn_send, src);
- brw_set_indirect_send_descriptor(p, insn_send, BRW_SFID_SAMPLER, addr);
+ brw_send_indirect_message(p, BRW_SFID_SAMPLER, dst, src, descr);
brw_pop_insn_state(p);
@@ -1080,10 +1071,10 @@
fs_generator::generate_uniform_pull_constant_load_gen7(fs_inst *inst,
brw_set_src0(p, insn_and, vec1(retype(index, BRW_REGISTER_TYPE_UD)));
brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
-
- /* a0.0 |= <descriptor> */
- brw_inst *insn_or = brw_next_insn(p, BRW_OPCODE_OR);
- brw_set_sampler_message(p, insn_or,
+ /* dst = send(payload, a0.0 | <descriptor>) */
+ struct brw_reg descr = retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD);
+ brw_inst *descr_inst = brw_build_indirect_message_descr(p, descr, addr);
+ brw_set_sampler_message(p, descr_inst,
0 /* surface */,
0 /* sampler */,
GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
@@ -1092,17 +1083,7 @@
fs_generator::generate_uniform_pull_constant_load_gen7(fs_inst *inst,
header_present,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
- brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
- brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
- brw_set_src0(p, insn_or, addr);
- brw_set_dest(p, insn_or, addr);
-
-
- /* dst = send(offset, a0.0) */
- brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
- brw_set_dest(p, insn_send, dst);
- brw_set_src0(p, insn_send, src);
- brw_set_indirect_send_descriptor(p, insn_send, BRW_SFID_SAMPLER, addr);
+ brw_send_indirect_message(p, BRW_SFID_SAMPLER, dst, src, descr);
brw_pop_insn_state(p);
@@ -1240,9 +1221,10 @@
fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
- /* a0.0 |= <descriptor> */
- brw_inst *insn_or = brw_next_insn(p, BRW_OPCODE_OR);
- brw_set_sampler_message(p, insn_or,
+ /* dst = send(offset, a0.0 | <descriptor>) */
+ struct brw_reg descr = retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD);
+ brw_inst *descr_inst = brw_build_indirect_message_descr(p, descr, addr);
+ brw_set_sampler_message(p, descr_inst,
0 /* surface */,
0 /* sampler */,
GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
@@ -1251,17 +1233,7 @@
fs_generator::generate_varying_pull_constant_load_gen7(fs_inst *inst,
false /* header */,
simd_mode,
0);
- brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
- brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
- brw_set_src0(p, insn_or, addr);
- brw_set_dest(p, insn_or, addr);
-
-
- /* dst = send(offset, a0.0) */
- brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
- brw_set_dest(p, insn_send, retype(dst, BRW_REGISTER_TYPE_UW));
- brw_set_src0(p, insn_send, offset);
- brw_set_indirect_send_descriptor(p, insn_send, BRW_SFID_SAMPLER, addr);
+ brw_send_indirect_message(p, BRW_SFID_SAMPLER, dst, offset, descr);
brw_pop_insn_state(p);
diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
index 010a5c4..6cdd611 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
@@ -419,9 +419,10 @@ vec4_generator::generate_tex(vec4_instruction *inst,
brw_AND(p, addr, addr, brw_imm_ud(0x0ff));
brw_OR(p, addr, addr, temp);
- /* a0.0 |= <descriptor> */
- brw_inst *insn_or = brw_next_insn(p, BRW_OPCODE_OR);
- brw_set_sampler_message(p, insn_or,
+ /* dst = send(offset, a0.0 | <descriptor>) */
+ struct brw_reg descr = retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD);
+ brw_inst *descr_inst = brw_build_indirect_message_descr(p, descr, addr);
+ brw_set_sampler_message(p, descr_inst,
0 /* surface */,
0 /* sampler */,
msg_type,
@@ -430,17 +431,7 @@ vec4_generator::generate_tex(vec4_instruction *inst,
inst->header_present /* header */,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
return_format);
- brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
- brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
- brw_set_src0(p, insn_or, addr);
- brw_set_dest(p, insn_or, addr);
-
-
- /* dst = send(offset, a0.0) */
- brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
- brw_set_dest(p, insn_send, dst);
- brw_set_src0(p, insn_send, src);
- brw_set_indirect_send_descriptor(p, insn_send, BRW_SFID_SAMPLER, addr);
+ brw_send_indirect_message(p, BRW_SFID_SAMPLER, dst, src, descr);
brw_pop_insn_state(p);
@@ -1082,9 +1073,10 @@
vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
brw_set_src1(p, insn_and, brw_imm_ud(0x0ff));
- /* a0.0 |= <descriptor> */
- brw_inst *insn_or = brw_next_insn(p, BRW_OPCODE_OR);
- brw_set_sampler_message(p, insn_or,
+ /* dst = send(offset, a0.0 | <descriptor>) */
+ struct brw_reg descr = retype(brw_address_reg(0), BRW_REGISTER_TYPE_UD);
+ brw_inst *descr_inst = brw_build_indirect_message_descr(p, descr, addr);
+ brw_set_sampler_message(p, descr_inst,
0 /* surface */,
0 /* sampler */,
GEN5_SAMPLER_MESSAGE_SAMPLE_LD,
@@ -1093,17 +1085,7 @@
vec4_generator::generate_pull_constant_load_gen7(vec4_instruction *inst,
false /* header */,
BRW_SAMPLER_SIMD_MODE_SIMD4X2,
0);
- brw_inst_set_exec_size(p->brw, insn_or, BRW_EXECUTE_1);
- brw_inst_set_src1_reg_type(p->brw, insn_or, BRW_REGISTER_TYPE_UD);
- brw_set_src0(p, insn_or, addr);
- brw_set_dest(p, insn_or, addr);
-
-
- /* dst = send(offset, a0.0) */
- brw_inst *insn_send = brw_next_insn(p, BRW_OPCODE_SEND);
- brw_set_dest(p, insn_send, dst);
- brw_set_src0(p, insn_send, offset);
- brw_set_indirect_send_descriptor(p, insn_send, BRW_SFID_SAMPLER, addr);
+ brw_send_indirect_message(p, BRW_SFID_SAMPLER, dst, offset, descr);
brw_pop_insn_state(p);
--
1.9.3
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