On Mon, Mar 02, 2015 at 12:54:21PM +0100, Marek Olšák wrote: > From: Marek Olšák <marek.ol...@amd.com> >
I'm still unsure whether it's better to use intrinsics or LLVM IR to implement these. I will think about this some more. -Tom > --- > src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > index 385d3ad..034095f 100644 > --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c > @@ -1293,6 +1293,8 @@ void radeon_llvm_context_init(struct > radeon_llvm_context * ctx) > bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and; > bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl; > bld_base->op_actions[TGSI_OPCODE_BGNLOOP].emit = bgnloop_emit; > + bld_base->op_actions[TGSI_OPCODE_BREV].emit = > build_tgsi_intrinsic_nomem; > + bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.AMDGPU.brev"; > bld_base->op_actions[TGSI_OPCODE_BRK].emit = brk_emit; > bld_base->op_actions[TGSI_OPCODE_CEIL].emit = > build_tgsi_intrinsic_nomem; > bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "ceil"; > @@ -1326,6 +1328,8 @@ void radeon_llvm_context_init(struct > radeon_llvm_context * ctx) > bld_base->op_actions[TGSI_OPCODE_FSNE].emit = emit_fcmp; > bld_base->op_actions[TGSI_OPCODE_IABS].emit = > build_tgsi_intrinsic_nomem; > bld_base->op_actions[TGSI_OPCODE_IABS].intr_name = "llvm.AMDIL.abs."; > + bld_base->op_actions[TGSI_OPCODE_IBFE].emit = > build_tgsi_intrinsic_nomem; > + bld_base->op_actions[TGSI_OPCODE_IBFE].intr_name = > "llvm.AMDGPU.bfe.i32"; > bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv; > bld_base->op_actions[TGSI_OPCODE_IF].emit = if_emit; > bld_base->op_actions[TGSI_OPCODE_UIF].emit = uif_emit; > @@ -1350,6 +1354,8 @@ void radeon_llvm_context_init(struct > radeon_llvm_context * ctx) > bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod; > bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not; > bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or; > + bld_base->op_actions[TGSI_OPCODE_POPC].emit = > build_tgsi_intrinsic_nomem; > + bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32"; > bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem; > bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32"; > bld_base->op_actions[TGSI_OPCODE_ROUND].emit = > build_tgsi_intrinsic_nomem; > @@ -1389,6 +1395,8 @@ void radeon_llvm_context_init(struct > radeon_llvm_context * ctx) > bld_base->op_actions[TGSI_OPCODE_TRUNC].emit = > build_tgsi_intrinsic_nomem; > bld_base->op_actions[TGSI_OPCODE_TRUNC].intr_name = "llvm.AMDGPU.trunc"; > bld_base->op_actions[TGSI_OPCODE_UADD].emit = emit_uadd; > + bld_base->op_actions[TGSI_OPCODE_UBFE].emit = > build_tgsi_intrinsic_nomem; > + bld_base->op_actions[TGSI_OPCODE_UBFE].intr_name = > "llvm.AMDGPU.bfe.u32"; > bld_base->op_actions[TGSI_OPCODE_UDIV].emit = emit_udiv; > bld_base->op_actions[TGSI_OPCODE_UMAX].emit = > build_tgsi_intrinsic_nomem; > bld_base->op_actions[TGSI_OPCODE_UMAX].intr_name = "llvm.AMDGPU.umax"; > -- > 2.1.0 > > _______________________________________________ > mesa-dev mailing list > mesa-dev@lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
