We need to swizzle the rhs to match the number of components in the writemask,
otherwise we'll hit an assertion in ir_assignment.
---
src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
index 878a54e..7a5f983 100644
--- a/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
+++ b/src/mesa/drivers/dri/i965/brw_lower_texture_gradients.cpp
@@ -123,7 +123,9 @@ lower_texture_grad_visitor::visit_leave(ir_texture *ir)
new(mem_ctx) ir_variable(grad_type, "size", ir_var_temporary);
if (ir->sampler->type->sampler_dimensionality == GLSL_SAMPLER_DIM_CUBE) {
base_ir->insert_before(size);
- base_ir->insert_before(assign(size, expr(ir_unop_i2f, txs),
WRITEMASK_XY));
+ base_ir->insert_before(assign(size,
+ swizzle_for_size(expr(ir_unop_i2f, txs),
2),
+ WRITEMASK_XY));
base_ir->insert_before(assign(size, new(mem_ctx) ir_constant(1.0f),
WRITEMASK_Z));
} else {
emit(size, expr(ir_unop_i2f,
--
1.9.1
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