On Wed, Feb 4, 2015 at 8:08 PM, Dave Airlie <airl...@gmail.com> wrote:
> This patch adds support for a set of double opcodes
> to TGSI. It is an update of work done originally
> by Michal Krol on the gallium-double-opcodes branch.
>
> The opcodes have a hint where they came from in the
> header file.
>
> v2: add unsigned/int <-> double
> v2.1: update docs.
>
> v3: add DRSQ (Glenn), fix review comments (Glenn).
> v3.1: add DRSQ docs, fix typo (Roland)
>
> This is based on code by Michael Krol <mic...@vmware.com>
>
> Signed-off-by: Dave Airlie <airl...@redhat.com>
> ---
> src/gallium/auxiliary/tgsi/tgsi_exec.c | 753
> ++++++++++++++++++++++++++++-
> src/gallium/auxiliary/tgsi/tgsi_info.c | 25 +-
> src/gallium/docs/source/tgsi.rst | 84 +++-
> src/gallium/include/pipe/p_shader_tokens.h | 27 +-
> 4 files changed, 870 insertions(+), 19 deletions(-)
>
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_exec.c
> b/src/gallium/auxiliary/tgsi/tgsi_exec.c
> index 834568b..57385fc 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_exec.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_exec.c
> +static void
> +micro_dldexp(union tgsi_double_channel *dst,
> + const union tgsi_double_channel *src0,
> + union tgsi_exec_channel *src1)
> +{
> + dst->d[0] = ldexp(src0->d[0], src1->i[1]);
oops?
> + dst->d[1] = ldexp(src0->d[1], src1->i[1]);
> + dst->d[2] = ldexp(src0->d[2], src1->i[2]);
> + dst->d[3] = ldexp(src0->d[3], src1->i[3]);
> +}
> +
> @@ -1090,11 +1341,11 @@ fetch_src_file_channel(const struct tgsi_exec_machine
> *mach,
> }
>
> static void
> -fetch_source(const struct tgsi_exec_machine *mach,
> - union tgsi_exec_channel *chan,
> - const struct tgsi_full_src_register *reg,
> - const uint chan_index,
> - enum tgsi_exec_datatype src_datatype)
> +fetch_source_d(const struct tgsi_exec_machine *mach,
> + union tgsi_exec_channel *chan,
> + const struct tgsi_full_src_register *reg,
> + const uint chan_index,
> + enum tgsi_exec_datatype src_datatype, bool dtype)
> {
> union tgsi_exec_channel index;
> union tgsi_exec_channel index2D;
> @@ -1238,6 +1489,10 @@ fetch_source(const struct tgsi_exec_machine *mach,
> &index2D,
> chan);
>
> + /* double modifiers handled by caller */
> + if (dtype)
> + return;
Should the below code just get moved to fetch_source? Or does it rely
on local args which makes that a pain? If it's not too hard, I think
it'd be a lot cleaner / clearer than an extra param here.
> +
> if (reg->Register.Absolute) {
> if (src_datatype == TGSI_EXEC_DATA_FLOAT) {
> micro_abs(chan, chan);
> @@ -1256,12 +1511,22 @@ fetch_source(const struct tgsi_exec_machine *mach,
> }
>
> static void
> -store_dest(struct tgsi_exec_machine *mach,
> - const union tgsi_exec_channel *chan,
> - const struct tgsi_full_dst_register *reg,
> - const struct tgsi_full_instruction *inst,
> - uint chan_index,
> - enum tgsi_exec_datatype dst_datatype)
> +fetch_source(const struct tgsi_exec_machine *mach,
> + union tgsi_exec_channel *chan,
> + const struct tgsi_full_src_register *reg,
> + const uint chan_index,
> + enum tgsi_exec_datatype src_datatype)
> +{
> + fetch_source_d(mach, chan, reg, chan_index, src_datatype, false);
> +}
> +
> +static void
> +store_dest_optsat(struct tgsi_exec_machine *mach,
> + const union tgsi_exec_channel *chan,
> + const struct tgsi_full_dst_register *reg,
> + const struct tgsi_full_instruction *inst,
> + uint chan_index,
> + enum tgsi_exec_datatype dst_datatype, bool sat)
> {
> uint i;
> union tgsi_exec_channel null;
> @@ -1471,6 +1736,14 @@ store_dest(struct tgsi_exec_machine *mach,
> }
> }
>
> + if (!sat) {
Same comment here about moving the sat code into store_dest.
> + /* doubles path */
> + for (i = 0; i < TGSI_QUAD_SIZE; i++)
> + if (execmask & (1 << i))
> + dst->i[i] = chan->i[i];
> + return;
> + }
> +
> switch (inst->Instruction.Saturate) {
> case TGSI_SAT_NONE:
> for (i = 0; i < TGSI_QUAD_SIZE; i++)
> @@ -1505,8 +1778,20 @@ store_dest(struct tgsi_exec_machine *mach,
> default:
> assert( 0 );
> }
> +
stray newline
> }
>
> +static void
> +store_dest(struct tgsi_exec_machine *mach,
> + const union tgsi_exec_channel *chan,
> + const struct tgsi_full_dst_register *reg,
> + const struct tgsi_full_instruction *inst,
> + uint chan_index,
> + enum tgsi_exec_datatype dst_datatype)
> +{
> + store_dest_optsat(mach, chan, reg, inst, chan_index,
> + dst_datatype, true);
> +}
Missing newline
> #define FETCH(VAL,INDEX,CHAN)\
> fetch_source(mach, VAL, &inst->Src[INDEX], CHAN, TGSI_EXEC_DATA_FLOAT)
>
> @@ -2980,6 +3265,354 @@ exec_endswitch(struct tgsi_exec_machine *mach)
> UPDATE_EXEC_MASK(mach);
> }
>
> +typedef void (* micro_dop)(union tgsi_double_channel *dst,
> + const union tgsi_double_channel *src);
> +
> +static void
> +fetch_double_channel(struct tgsi_exec_machine *mach,
> + union tgsi_double_channel *chan,
> + const struct tgsi_full_src_register *reg,
> + uint chan_0,
> + uint chan_1)
> +{
> + union tgsi_exec_channel src[2];
> + uint i;
> +
> + fetch_source_d(mach, &src[0], reg, chan_0, TGSI_EXEC_DATA_UINT, true);
> + fetch_source_d(mach, &src[1], reg, chan_1, TGSI_EXEC_DATA_UINT, true);
> +
> + for (i = 0; i < TGSI_QUAD_SIZE; i++) {
> + chan->u[i][0] = src[0].u[i];
> + chan->u[i][1] = src[1].u[i];
> + }
> + if (reg->Register.Absolute) {
> + micro_dabs(chan, chan);
> + }
> + if (reg->Register.Negate) {
> + micro_dneg(chan, chan);
> + }
> +
> +}
> +
> +static void
> +store_double_channel(struct tgsi_exec_machine *mach,
> + const union tgsi_double_channel *chan,
> + const struct tgsi_full_dst_register *reg,
> + const struct tgsi_full_instruction *inst,
> + uint chan_0,
> + uint chan_1)
> +{
> + union tgsi_exec_channel dst[2];
> + uint i;
> + union tgsi_double_channel temp;
> + const uint execmask = mach->ExecMask;
> + switch (inst->Instruction.Saturate) {
> + case TGSI_SAT_NONE:
> + for (i = 0; i < TGSI_QUAD_SIZE; i++)
> + if (execmask & (1 << i)) {
> + dst[0].u[i] = chan->u[i][0];
> + dst[1].u[i] = chan->u[i][1];
> + }
> + break;
> +
> + case TGSI_SAT_ZERO_ONE:
> + for (i = 0; i < TGSI_QUAD_SIZE; i++)
> + if (execmask & (1 << i)) {
> + if (chan->d[i] < 0.0f)
> + temp.d[i] = 0.0;
> + else if (chan->d[i] > 1.0f)
> + temp.d[i] = 1.0;
> + else
> + temp.d[i] = chan->d[i];
> +
> + dst[0].u[i] = temp.u[i][0];
> + dst[1].u[i] = temp.u[i][1];
> + }
> + break;
> +
> + case TGSI_SAT_MINUS_PLUS_ONE:
> + for (i = 0; i < TGSI_QUAD_SIZE; i++)
> + if (execmask & (1 << i)) {
> + if (chan->d[i] < -1.0)
> + temp.d[i] = -1.0;
> + else if (chan->d[i] > 1.0)
> + temp.d[i] = 1.0;
> + else
> + temp.d[i] = chan->d[i];
> +
> + dst[0].u[i] = temp.u[i][0];
> + dst[1].u[i] = temp.u[i][1];
> + }
> + break;
> +
> + default:
> + assert( 0 );
> + }
> +
> + store_dest_optsat(mach, &dst[0], reg, inst, chan_0, TGSI_EXEC_DATA_UINT,
> false);
> + if (chan_1 != -1)
> + store_dest_optsat(mach, &dst[1], reg, inst, chan_1,
> TGSI_EXEC_DATA_UINT, false);
> +}
> +
> +static void
> +exec_double_unary(struct tgsi_exec_machine *mach,
> + const struct tgsi_full_instruction *inst,
> + micro_dop op)
> +{
> + union tgsi_double_channel src;
> + union tgsi_double_channel dst;
> +
> + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) ==
> TGSI_WRITEMASK_XY) {
> + fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + op(&dst, &src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + }
> + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) ==
> TGSI_WRITEMASK_ZW) {
> + fetch_double_channel(mach, &src, &inst->Src[0], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + op(&dst, &src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + }
> +}
> +
> +static void
> +exec_double_binary(struct tgsi_exec_machine *mach,
> + const struct tgsi_full_instruction *inst,
> + micro_dop op,
> + enum tgsi_exec_datatype dst_datatype)
> +{
> + union tgsi_double_channel src[2];
> + union tgsi_double_channel dst;
> + int first_dest_chan, second_dest_chan;
> + int wmask;
> +
> + wmask = inst->Dst[0].Register.WriteMask;
> + if (wmask & TGSI_WRITEMASK_XY) {
Please comment as to why this is written differently than the
unary/trinary cases. I assume it's for something like DSLT?
> + first_dest_chan = TGSI_CHAN_X;
> + second_dest_chan = TGSI_CHAN_Y;
> + if (dst_datatype == TGSI_EXEC_DATA_UINT) {
> + first_dest_chan = (wmask & TGSI_WRITEMASK_X) ? TGSI_CHAN_X :
> TGSI_CHAN_Y;
> + second_dest_chan = -1;
> + }
> +
> + fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + op(&dst, src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, first_dest_chan,
> second_dest_chan);
> + }
> +
> + if (wmask & TGSI_WRITEMASK_ZW) {
> + first_dest_chan = TGSI_CHAN_Z;
> + second_dest_chan = TGSI_CHAN_W;
> + if (dst_datatype == TGSI_EXEC_DATA_UINT) {
> + first_dest_chan = (wmask & TGSI_WRITEMASK_Z) ? TGSI_CHAN_Z :
> TGSI_CHAN_W;
> + second_dest_chan = -1;
> + }
> +
> + fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + op(&dst, src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, first_dest_chan,
> second_dest_chan);
> + }
> +}
> +
> +static void
> +exec_double_trinary(struct tgsi_exec_machine *mach,
> + const struct tgsi_full_instruction *inst,
> + micro_dop op)
> +{
> + union tgsi_double_channel src[3];
> + union tgsi_double_channel dst;
> +
> + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_XY) ==
> TGSI_WRITEMASK_XY) {
> + fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + fetch_double_channel(mach, &src[2], &inst->Src[2], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + op(&dst, src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + }
> + if ((inst->Dst[0].Register.WriteMask & TGSI_WRITEMASK_ZW) ==
> TGSI_WRITEMASK_ZW) {
> + fetch_double_channel(mach, &src[0], &inst->Src[0], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + fetch_double_channel(mach, &src[1], &inst->Src[1], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + fetch_double_channel(mach, &src[2], &inst->Src[2], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + op(&dst, src);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + }
> +}
> +
> +static void
> +exec_dldexp(struct tgsi_exec_machine *mach,
> + const struct tgsi_full_instruction *inst)
> +{
> + union tgsi_double_channel src0;
> + union tgsi_exec_channel src1;
> + union tgsi_double_channel dst;
> + int wmask;
> +
> + wmask = inst->Dst[0].Register.WriteMask;
> + if (wmask & TGSI_WRITEMASK_XY) {
> +
extra line
> + fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_X,
> TGSI_EXEC_DATA_INT);
> + micro_dldexp(&dst, &src0, &src1);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_X,
> TGSI_CHAN_Y);
> + }
> +
> + if (wmask & TGSI_WRITEMASK_ZW) {
> + fetch_double_channel(mach, &src0, &inst->Src[0], TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + fetch_source(mach, &src1, &inst->Src[1], TGSI_CHAN_Z,
> TGSI_EXEC_DATA_INT);
> + micro_dldexp(&dst, &src0, &src1);
> + store_double_channel(mach, &dst, &inst->Dst[0], inst, TGSI_CHAN_Z,
> TGSI_CHAN_W);
> + }
> +}
> +
> diff --git a/src/gallium/auxiliary/tgsi/tgsi_info.c
> b/src/gallium/auxiliary/tgsi/tgsi_info.c
> index c90d24c..8313722 100644
> --- a/src/gallium/auxiliary/tgsi/tgsi_info.c
> +++ b/src/gallium/auxiliary/tgsi/tgsi_info.c
> @@ -231,10 +231,33 @@ static const struct tgsi_opcode_info
> opcode_info[TGSI_OPCODE_LAST] =
> { 1, 1, 0, 0, 0, 0, COMP, "LSB", TGSI_OPCODE_LSB },
> { 1, 1, 0, 0, 0, 0, COMP, "IMSB", TGSI_OPCODE_IMSB },
> { 1, 1, 0, 0, 0, 0, COMP, "UMSB", TGSI_OPCODE_UMSB },
> -
> { 1, 1, 0, 0, 0, 0, OTHR, "INTERP_CENTROID", TGSI_OPCODE_INTERP_CENTROID
> },
> { 1, 2, 0, 0, 0, 0, OTHR, "INTERP_SAMPLE", TGSI_OPCODE_INTERP_SAMPLE },
> { 1, 2, 0, 0, 0, 0, OTHR, "INTERP_OFFSET", TGSI_OPCODE_INTERP_OFFSET },
> + { 1, 1, 0, 0, 0, 0, COMP, "F2D", TGSI_OPCODE_F2D },
I'd group these with the other COMP ones... That's why I had added the
whitespace for INTERP_*.
> + { 1, 1, 0, 0, 0, 0, COMP, "D2F", TGSI_OPCODE_D2F },
> + { 1, 1, 0, 0, 0, 0, COMP, "DABS", TGSI_OPCODE_DABS },
> + { 1, 1, 0, 0, 0, 0, COMP, "DNEG", TGSI_OPCODE_DNEG },
> + { 1, 2, 0, 0, 0, 0, COMP, "DADD", TGSI_OPCODE_DADD },
> + { 1, 2, 0, 0, 0, 0, COMP, "DDIV", TGSI_OPCODE_DDIV },
> + { 1, 2, 0, 0, 0, 0, COMP, "DMUL", TGSI_OPCODE_DMUL },
> + { 1, 2, 0, 0, 0, 0, COMP, "DMAX", TGSI_OPCODE_DMAX },
> + { 1, 2, 0, 0, 0, 0, COMP, "DMIN", TGSI_OPCODE_DMIN },
> + { 1, 2, 0, 0, 0, 0, COMP, "DSLT", TGSI_OPCODE_DSLT },
> + { 1, 2, 0, 0, 0, 0, COMP, "DSGE", TGSI_OPCODE_DSGE },
> + { 1, 2, 0, 0, 0, 0, COMP, "DSEQ", TGSI_OPCODE_DSEQ },
> + { 1, 2, 0, 0, 0, 0, COMP, "DSNE", TGSI_OPCODE_DSNE },
> + { 1, 1, 0, 0, 0, 0, COMP, "DRCP", TGSI_OPCODE_DRCP },
> + { 1, 1, 0, 0 ,0, 0, COMP, "DSQRT", TGSI_OPCODE_DSQRT },
> + { 1, 3, 0, 0 ,0, 0, COMP, "DMAD", TGSI_OPCODE_DMAD },
> + { 1, 1, 0, 0, 0, 0, COMP, "DFRAC", TGSI_OPCODE_DFRAC},
> + { 1, 2, 0, 0, 0, 0, COMP, "DLDEXP", TGSI_OPCODE_DLDEXP},
> + { 2, 1, 0, 0, 0, 0, COMP, "DFRACEXP", TGSI_OPCODE_DFRACEXP},
> + { 1, 1, 0, 0, 0, 0, COMP, "D2I", TGSI_OPCODE_D2I },
> + { 1, 1, 0, 0, 0, 0, COMP, "I2D", TGSI_OPCODE_I2D },
> + { 1, 1, 0, 0, 0, 0, COMP, "D2U", TGSI_OPCODE_D2U },
> + { 1, 1, 0, 0, 0, 0, COMP, "U2D", TGSI_OPCODE_U2D },
> + { 1, 1, 0, 0 ,0, 0, COMP, "DRSQ", TGSI_OPCODE_DRSQ },
> };
>
> const struct tgsi_opcode_info *
> diff --git a/src/gallium/docs/source/tgsi.rst
> b/src/gallium/docs/source/tgsi.rst
> index 84b0ed6..4b793ee 100644
> --- a/src/gallium/docs/source/tgsi.rst
> +++ b/src/gallium/docs/source/tgsi.rst
> @@ -1808,7 +1808,10 @@ Double ISA
> The double-precision opcodes reinterpret four-component vectors into
> two-component vectors with doubled precision in each component.
>
> -Support for these opcodes is XXX undecided. :T
> +.. opcode:: DABS - Absolute
> +
> + dst.xy = |src0.xy|
> + dst.zw = |src0.zw|
>
> .. opcode:: DADD - Add
>
> @@ -1831,17 +1834,33 @@ Support for these opcodes is XXX undecided. :T
>
> .. math::
>
> - dst.xy = src0.xy == src1.xy ? 1.0F : 0.0F
> + dst.x = src0.xy == src1.xy ? \sim 0 : 0
> +
> + dst.z = src0.zw == src1.zw ? \sim 0 : 0
> +
> +.. opcode:: DSNE - Set on Not Equal
> +
> +.. math::
> +
> + dst.x = src0.xy != src1.xy ? \sim 0 : 0
>
> - dst.zw = src0.zw == src1.zw ? 1.0F : 0.0F
> + dst.z = src0.zw != src1.zw ? \sim 0 : 0
>
> .. opcode:: DSLT - Set on Less than
>
> .. math::
>
> - dst.xy = src0.xy < src1.xy ? 1.0F : 0.0F
> + dst.x = src0.xy < src1.xy ? \sim 0 : 0
> +
> + dst.z = src0.zw < src1.zw ? \sim 0 : 0
> +
> +.. opcode:: DSGE - Set on Greater equal
> +
> +.. math::
> +
> + dst.x = src0.xy >= src1.xy ? \sim 0 : 0
>
> - dst.zw = src0.zw < src1.zw ? 1.0F : 0.0F
> + dst.z = src0.zw >= src1.zw ? \sim 0 : 0
>
> .. opcode:: DFRAC - Fraction
>
> @@ -1928,7 +1947,62 @@ This opcode is the inverse of :opcode:`DFRACEXP`.
>
> dst.zw = \sqrt{src.zw}
>
> +.. opcode:: DRSQ - Reciprocal Square Root
> +
> +.. math::
> +
> + dst.xy = \frac{1}{\sqrt{src.xy}}
> +
> + dst.zw = \frac{1}{\sqrt{src.zw}}
> +
> +.. opcode:: F2D - Float to Double
> +
> +.. math::
> +
> + dst.xy = double(src0.x)
> +
> + dst.zw = double(src0.z)
> +
> +.. opcode:: D2F - Double to Float
> +
> +.. math::
> +
> + dst.x = float(src0.xy)
> +
> + dst.z = float(src0.zw)
> +
> +.. opcode:: I2D - Int to Double
> +
> +.. math::
> +
> + dst.xy = double(src0.x)
> +
> + dst.zw = double(src0.z)
> +
> +.. opcode:: D2I - Double to Int
> +
> +.. math::
> +
> + dst.x = int(src0.xy)
> +
> + dst.z = int(src0.zw)
> +
> +.. opcode:: U2D - Unsigned Int to Double
> +
> +.. math::
> +
> + dst.xy = double(src0.x)
> +
> + dst.zw = double(src0.z)
Is it .z? I thought it was .y... Same for the other float/int <-> double stuff.
> +
> +.. opcode:: D2U - Double to Unsigned Int
> +
> +.. math::
>
> + dst.x = unsigned(src0.xy)
> +
> + dst.z = unsigned(src0.zw)
> +
> .. _samplingopcodes:
>
> Resource Sampling Opcodes
> diff --git a/src/gallium/include/pipe/p_shader_tokens.h
> b/src/gallium/include/pipe/p_shader_tokens.h
> index 442b67b..f3829e0 100644
> --- a/src/gallium/include/pipe/p_shader_tokens.h
> +++ b/src/gallium/include/pipe/p_shader_tokens.h
> @@ -494,7 +494,32 @@ struct tgsi_property_data {
> #define TGSI_OPCODE_INTERP_SAMPLE 193
> #define TGSI_OPCODE_INTERP_OFFSET 194
>
> -#define TGSI_OPCODE_LAST 195
> +/* sm5 marked opcodes are supported in D3D11 optionally - also DMOV, DMOVC */
> +#define TGSI_OPCODE_F2D 195 /* SM5 */
> +#define TGSI_OPCODE_D2F 196
> +#define TGSI_OPCODE_DABS 197
> +#define TGSI_OPCODE_DNEG 198 /* SM5 */
> +#define TGSI_OPCODE_DADD 199 /* SM5 */
> +#define TGSI_OPCODE_DDIV 200 /* SM5 */
> +#define TGSI_OPCODE_DMUL 201 /* SM5 */
> +#define TGSI_OPCODE_DMAX 202 /* SM5 */
> +#define TGSI_OPCODE_DMIN 203 /* SM5 */
> +#define TGSI_OPCODE_DSLT 204 /* SM5 */
> +#define TGSI_OPCODE_DSGE 205 /* SM5 */
> +#define TGSI_OPCODE_DSEQ 206 /* SM5 */
> +#define TGSI_OPCODE_DSNE 207 /* SM5 */
> +#define TGSI_OPCODE_DRCP 208 /* eg, cayman */
> +#define TGSI_OPCODE_DSQRT 209 /* eg, cayman also has DRSQ */
> +#define TGSI_OPCODE_DMAD 210 /* DFMA? */
> +#define TGSI_OPCODE_DFRAC 211 /* eg, cayman */
> +#define TGSI_OPCODE_DLDEXP 212 /* eg, cayman */
> +#define TGSI_OPCODE_DFRACEXP 213 /* eg, cayman */
> +#define TGSI_OPCODE_D2I 214
> +#define TGSI_OPCODE_I2D 215
> +#define TGSI_OPCODE_D2U 216
> +#define TGSI_OPCODE_U2D 217
> +#define TGSI_OPCODE_DRSQ 218 /* eg, cayman also has DRSQ */
> +#define TGSI_OPCODE_LAST 219
>
> #define TGSI_SAT_NONE 0 /* do not saturate */
> #define TGSI_SAT_ZERO_ONE 1 /* clamp to [0,1] */
> --
> 1.9.3
>
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