On Tue, Jan 27, 2015 at 8:16 PM, Kenneth Graunke <kenn...@whitecape.org> wrote:
> On Tuesday, January 27, 2015 02:32:19 PM Jason Ekstrand wrote:
>> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=88792
>> ---
>>
>> Yes, computing it from the surface state and bo->offset64 is a little
>> strange when we could just be using mt->offset. However, that's the way
>> it's done on all the other gens so I decided to be consistent.
>
> Yeah...I've never understood why that was done. It seems silly to me.
> Plus, with the uint64_t casts, it's even uglier.
>
> How about just supplying mt->offset?
I think it's an idiom that's been copied from other relocs where the
reloc value was a little more work to compute. Eg
surf[1] = (intel_renderbuffer_get_tile_offsets(irb, &tile_x, &tile_y) +
mt->bo->offset64 + mt->offset);
and
drm_intel_bo_emit_reloc(brw->batch.bo,
brw->wm.base.surf_offset[surf_index] + 4,
mt->bo,
surf[1] - mt->bo->offset64,
I915_GEM_DOMAIN_RENDER,
I915_GEM_DOMAIN_RENDER);
Kristian
> Either way,
> Reviewed-by: Kenneth Graunke <kenn...@whitecape.org>
> and thanks for fixing this!
>
>> src/mesa/drivers/dri/i965/gen8_surface_state.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> b/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> index 45c35db..16b5a7e 100644
>> --- a/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> +++ b/src/mesa/drivers/dri/i965/gen8_surface_state.c
>> @@ -450,7 +450,7 @@ gen8_update_renderbuffer_surface(struct brw_context *brw,
>> drm_intel_bo_emit_reloc(brw->batch.bo,
>> brw->wm.base.surf_offset[surf_index] + 8 * 4,
>> mt->bo,
>> - 0,
>> + *((uint64_t *) &surf[8]) - mt->bo->offset64,
>
> ^^^^^^^ Tabs?!
>
>> I915_GEM_DOMAIN_RENDER,
>> I915_GEM_DOMAIN_RENDER);
>> }
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