Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek
On Fri, Jan 9, 2015 at 4:34 AM, Dave Airlie <airl...@gmail.com> wrote:
> From: Dave Airlie <airl...@redhat.com>
>
> After much searching and empricial testing, and reading of
> things I've no justifcation for this fix, other than it really
> appears this is what the hw is doing or close enough.
>
> It makes sense that each entry in the FMASK corresponds to
> an entry in the CMASKm and the CMASK is organised into 128x128
> blocks, but I can't find anything in any of the docs/info from AMD.
>
> But I've spent a lot of time on this, and this seems to be the
> simplest fix, in that we don't over allocate things too much,
> once this fix in place we can nuke the extra multiplier in mesa.
>
> Signed-off-by: Dave Airlie <airl...@redhat.com>
> ---
> radeon/radeon_surface.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/radeon/radeon_surface.c b/radeon/radeon_surface.c
> index 930017e..bd9ee6d 100644
> --- a/radeon/radeon_surface.c
> +++ b/radeon/radeon_surface.c
> @@ -366,6 +366,8 @@ static int r6_surface_init_2d(struct
> radeon_surface_manager *surf_man,
> xalign = (surf_man->hw_info.group_bytes * surf_man->hw_info.num_banks) /
> (tilew * surf->bpe * surf->nsamples);
> xalign = MAX2(tilew * surf_man->hw_info.num_banks, xalign);
> + if (surf->flags & RADEON_SURF_FMASK)
> + xalign = MAX2(128, xalign);
> yalign = tilew * surf_man->hw_info.num_pipes;
> if (surf->flags & RADEON_SURF_SCANOUT) {
> xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign);
> --
> 2.1.0
>
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