Sure. I've reverted it.
Marek
On Wed, Jan 7, 2015 at 9:03 PM, Tom Stellard <t...@stellard.net> wrote:
> On Mon, Jan 05, 2015 at 12:18:40AM +0100, Marek Olšák wrote:
>> From: Marek Olšák <marek.ol...@amd.com>
>>
>> - the relocs array is unused, remove it
>> - ndw is at most 115 (init), set 140 as the maximum
>> - compute needs 4 buffers per state, graphics only needs 1; set 4 as the
>> maximum
>
> The number of buffers per state is dependent on the input arguments to the
> kernel,
> so it can be way more than 4.
>
> OpenCL requires that the input buffer be at least 256 bytes, which means at
> minimum,
> we must be able to support:
>
> (256 / 8) + 3 (internal buffers) = 35 buffers
>
> This patch breaks most of the OpenCL tests, can we revert it for now?
>
> -Tom
>
>> ---
>> src/gallium/drivers/radeonsi/si_pm4.c | 6 +-----
>> src/gallium/drivers/radeonsi/si_pm4.h | 9 ++-------
>> 2 files changed, 3 insertions(+), 12 deletions(-)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_pm4.c
>> b/src/gallium/drivers/radeonsi/si_pm4.c
>> index 954eb6e..21ab9f2 100644
>> --- a/src/gallium/drivers/radeonsi/si_pm4.c
>> +++ b/src/gallium/drivers/radeonsi/si_pm4.c
>> @@ -145,17 +145,13 @@ unsigned si_pm4_dirty_dw(struct si_context *sctx)
>> void si_pm4_emit(struct si_context *sctx, struct si_pm4_state *state)
>> {
>> struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs;
>> +
>> for (int i = 0; i < state->nbo; ++i) {
>> r600_context_bo_reloc(&sctx->b, &sctx->b.rings.gfx,
>> state->bo[i],
>> state->bo_usage[i],
>> state->bo_priority[i]);
>> }
>>
>> memcpy(&cs->buf[cs->cdw], state->pm4, state->ndw * 4);
>> -
>> - for (int i = 0; i < state->nrelocs; ++i) {
>> - cs->buf[cs->cdw + state->relocs[i]] += cs->cdw << 2;
>> - }
>> -
>> cs->cdw += state->ndw;
>>
>> #if SI_TRACE_CS
>> diff --git a/src/gallium/drivers/radeonsi/si_pm4.h
>> b/src/gallium/drivers/radeonsi/si_pm4.h
>> index 8680a9e..388bb4b 100644
>> --- a/src/gallium/drivers/radeonsi/si_pm4.h
>> +++ b/src/gallium/drivers/radeonsi/si_pm4.h
>> @@ -29,9 +29,8 @@
>>
>> #include "radeon/drm/radeon_winsys.h"
>>
>> -#define SI_PM4_MAX_DW 256
>> -#define SI_PM4_MAX_BO 32
>> -#define SI_PM4_MAX_RELOCS 4
>> +#define SI_PM4_MAX_DW 140
>> +#define SI_PM4_MAX_BO 4
>>
>> // forward defines
>> struct si_context;
>> @@ -54,10 +53,6 @@ struct si_pm4_state
>> enum radeon_bo_usage bo_usage[SI_PM4_MAX_BO];
>> enum radeon_bo_priority bo_priority[SI_PM4_MAX_BO];
>>
>> - /* relocs for shader data */
>> - unsigned nrelocs;
>> - unsigned relocs[SI_PM4_MAX_RELOCS];
>> -
>> bool compute_pkt;
>> };
>>
>> --
>> 2.1.0
>>
>> _______________________________________________
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>> mesa-dev@lists.freedesktop.org
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