If clip distances are used, there can be 8 of them. Otherwise, if user clip planes are used, there can only be 6 of them. If clip vertex is used, there can still only be 6 clip planes - even though they are lowered to clip distances.
So first the writemask for clip distances is computed: unsigned clipdist_mask = info->writes_clipvertex ? SIX_BITS : info->clipdist_writemask; Then, if clipdist_mask is zero and clip planes are enabled, we must be using legacy user clip planes, which are enable or disabled with: (clipdist_mask ? 0 : sctx->queued.named.rasterizer->clip_plane_enable & SIX_BITS) Marek On Tue, Dec 9, 2014 at 3:48 PM, Ilia Mirkin <imir...@alum.mit.edu> wrote: > On Tue, Dec 9, 2014 at 6:39 AM, Marek Olšák <mar...@gmail.com> wrote: >> From: Marek Olšák <marek.ol...@amd.com> >> >> --- >> src/gallium/drivers/radeonsi/si_shader.c | 27 ++++++++---------------- >> src/gallium/drivers/radeonsi/si_shader.h | 11 +++++----- >> src/gallium/drivers/radeonsi/si_state_draw.c | 31 >> +++++++++++++++++----------- >> 3 files changed, 34 insertions(+), 35 deletions(-) >> >> diff --git a/src/gallium/drivers/radeonsi/si_shader.c >> b/src/gallium/drivers/radeonsi/si_shader.c >> index ec37646..043a5ea 100644 >> --- a/src/gallium/drivers/radeonsi/si_shader.c >> +++ b/src/gallium/drivers/radeonsi/si_shader.c >> @@ -804,7 +804,6 @@ static void si_llvm_emit_clipvertex(struct >> lp_build_tgsi_context * bld_base, >> LLVMValueRef (*pos)[9], LLVMValueRef >> *out_elts) >> { >> struct si_shader_context *si_shader_ctx = >> si_shader_context(bld_base); >> - struct si_shader *shader = si_shader_ctx->shader; >> struct lp_build_context *base = &bld_base->base; >> struct lp_build_context *uint = >> &si_shader_ctx->radeon_bld.soa.bld_base.uint_bld; >> unsigned reg_index; >> @@ -818,8 +817,6 @@ static void si_llvm_emit_clipvertex(struct >> lp_build_tgsi_context * bld_base, >> for (reg_index = 0; reg_index < 2; reg_index ++) { >> LLVMValueRef *args = pos[2 + reg_index]; >> >> - shader->clip_dist_write |= 0xf << (4 * reg_index); >> - >> args[5] = >> args[6] = >> args[7] = >> @@ -1088,18 +1085,12 @@ handle_semantic: >> /* Select the correct target */ >> switch(semantic_name) { >> case TGSI_SEMANTIC_PSIZE: >> - shader->vs_out_misc_write = true; >> - shader->vs_out_point_size = true; >> psize_value = outputs[i].values[0]; >> continue; >> case TGSI_SEMANTIC_EDGEFLAG: >> - shader->vs_out_misc_write = true; >> - shader->vs_out_edgeflag = true; >> edgeflag_value = outputs[i].values[0]; >> continue; >> case TGSI_SEMANTIC_LAYER: >> - shader->vs_out_misc_write = true; >> - shader->vs_out_layer = true; >> layer_value = outputs[i].values[0]; >> continue; >> case TGSI_SEMANTIC_POSITION: >> @@ -1112,8 +1103,6 @@ handle_semantic: >> param_count++; >> break; >> case TGSI_SEMANTIC_CLIPDIST: >> - shader->clip_dist_write |= >> - 0xf << (semantic_index * 4); >> target = V_008DFC_SQ_EXP_POS + 2 + semantic_index; >> break; >> case TGSI_SEMANTIC_CLIPVERTEX: >> @@ -1166,11 +1155,13 @@ handle_semantic: >> } >> >> /* Write the misc vector (point size, edgeflag, layer, viewport). */ >> - if (shader->vs_out_misc_write) { >> + if (shader->selector->info.writes_psize || >> + shader->selector->info.writes_edgeflag || >> + shader->selector->info.writes_layer) { >> pos_args[1][0] = lp_build_const_int32(base->gallivm, /* >> writemask */ >> - >> shader->vs_out_point_size | >> - >> (shader->vs_out_edgeflag << 1) | >> - (shader->vs_out_layer >> << 2)); >> + >> shader->selector->info.writes_psize | >> + >> (shader->selector->info.writes_edgeflag << 1) | >> + >> (shader->selector->info.writes_layer << 2)); >> pos_args[1][1] = uint->zero; /* EXEC mask */ >> pos_args[1][2] = uint->zero; /* last export? */ >> pos_args[1][3] = lp_build_const_int32(base->gallivm, >> V_008DFC_SQ_EXP_POS + 1); >> @@ -1180,10 +1171,10 @@ handle_semantic: >> pos_args[1][7] = base->zero; /* Z */ >> pos_args[1][8] = base->zero; /* W */ >> >> - if (shader->vs_out_point_size) >> + if (shader->selector->info.writes_psize) >> pos_args[1][5] = psize_value; >> >> - if (shader->vs_out_edgeflag) { >> + if (shader->selector->info.writes_edgeflag) { >> /* The output is a float, but the hw expects an >> integer >> * with the first bit containing the edge flag. */ >> edgeflag_value = >> LLVMBuildFPToUI(base->gallivm->builder, >> @@ -1199,7 +1190,7 @@ handle_semantic: >> base->elem_type, >> ""); >> } >> >> - if (shader->vs_out_layer) >> + if (shader->selector->info.writes_layer) >> pos_args[1][7] = layer_value; >> } >> >> diff --git a/src/gallium/drivers/radeonsi/si_shader.h >> b/src/gallium/drivers/radeonsi/si_shader.h >> index 5e8c9e6..124615e 100644 >> --- a/src/gallium/drivers/radeonsi/si_shader.h >> +++ b/src/gallium/drivers/radeonsi/si_shader.h >> @@ -159,15 +159,16 @@ struct si_shader { >> unsigned >> ps_input_param_offset[PIPE_MAX_SHADER_INPUTS]; >> >> bool uses_instanceid; >> - bool vs_out_misc_write; >> - bool vs_out_point_size; >> - bool vs_out_edgeflag; >> - bool vs_out_layer; >> unsigned nr_pos_exports; >> - unsigned clip_dist_write; >> bool is_gs_copy_shader; >> }; >> >> +static inline struct tgsi_shader_info *si_get_vs_info(struct si_context >> *sctx) >> +{ >> + return sctx->gs_shader ? &sctx->gs_shader->info >> + : &sctx->vs_shader->info; >> +} >> + >> static inline struct si_shader* si_get_vs_state(struct si_context *sctx) >> { >> if (sctx->gs_shader) >> diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c >> b/src/gallium/drivers/radeonsi/si_state_draw.c >> index 57c651f..563d9ab 100644 >> --- a/src/gallium/drivers/radeonsi/si_state_draw.c >> +++ b/src/gallium/drivers/radeonsi/si_state_draw.c >> @@ -149,27 +149,34 @@ static unsigned si_get_ia_multi_vgt_param(struct >> si_context *sctx, >> S_028AA8_WD_SWITCH_ON_EOP(sctx->b.chip_class >= CIK ? >> wd_switch_on_eop : 0); >> } >> >> +#define SIX_BITS 0x3F > > Just curious... why 6 bits? Can't there be 8 clip planes/distances? > >> + >> static void si_emit_clip_state(struct si_context *sctx) >> { >> struct radeon_winsys_cs *cs = sctx->b.rings.gfx.cs; >> + struct tgsi_shader_info *info = si_get_vs_info(sctx); >> struct si_shader *vs = si_get_vs_state(sctx); >> unsigned window_space = >> >> vs->selector->info.properties[TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION]; >> + unsigned clipdist_mask = >> + info->writes_clipvertex ? SIX_BITS : >> info->clipdist_writemask; >> >> r600_write_context_reg(cs, R_02881C_PA_CL_VS_OUT_CNTL, >> - S_02881C_USE_VTX_POINT_SIZE(vs->vs_out_point_size) | >> - S_02881C_USE_VTX_EDGE_FLAG(vs->vs_out_edgeflag) | >> - S_02881C_USE_VTX_RENDER_TARGET_INDX(vs->vs_out_layer) >> | >> - S_02881C_VS_OUT_CCDIST0_VEC_ENA((vs->clip_dist_write >> & 0x0F) != 0) | >> - S_02881C_VS_OUT_CCDIST1_VEC_ENA((vs->clip_dist_write >> & 0xF0) != 0) | >> - S_02881C_VS_OUT_MISC_VEC_ENA(vs->vs_out_misc_write) | >> - (sctx->queued.named.rasterizer->clip_plane_enable & >> - vs->clip_dist_write)); >> + S_02881C_USE_VTX_POINT_SIZE(info->writes_psize) | >> + S_02881C_USE_VTX_EDGE_FLAG(info->writes_edgeflag) | >> + S_02881C_USE_VTX_RENDER_TARGET_INDX(info->writes_layer) | >> + S_02881C_VS_OUT_CCDIST0_VEC_ENA((clipdist_mask & 0x0F) != 0) >> | >> + S_02881C_VS_OUT_CCDIST1_VEC_ENA((clipdist_mask & 0xF0) != 0) >> | >> + S_02881C_VS_OUT_MISC_VEC_ENA(info->writes_psize || >> + info->writes_edgeflag || >> + info->writes_layer) | >> + (sctx->queued.named.rasterizer->clip_plane_enable & >> + clipdist_mask)); >> r600_write_context_reg(cs, R_028810_PA_CL_CLIP_CNTL, >> - sctx->queued.named.rasterizer->pa_cl_clip_cntl | >> - (vs->clip_dist_write ? 0 : >> - sctx->queued.named.rasterizer->clip_plane_enable & >> 0x3F) | >> - S_028810_CLIP_DISABLE(window_space)); >> + sctx->queued.named.rasterizer->pa_cl_clip_cntl | >> + (clipdist_mask ? 0 : >> + sctx->queued.named.rasterizer->clip_plane_enable & >> SIX_BITS) | >> + S_028810_CLIP_DISABLE(window_space)); >> } >> >> static void si_emit_rasterizer_prim_state(struct si_context *sctx, unsigned >> mode) >> -- >> 2.1.0 >> >> _______________________________________________ >> mesa-dev mailing list >> mesa-dev@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/mesa-dev _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev