The scalar vertex shader will use the ATTR register file for vertex
attributes. This patch adds support for the ATTR file to fs_visitor.
Signed-off-by: Kristian Høgsberg <k...@bitplanet.net>
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 12 ++++++++++--
src/mesa/drivers/dri/i965/brw_fs.h | 3 +++
src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 2 --
src/mesa/drivers/dri/i965/brw_fs_visitor.cpp | 11 +++++++++--
4 files changed, 22 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 9d07857..00156c7 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -76,7 +76,7 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const
fs_reg &dst,
this->exec_size = dst.width;
} else {
for (int i = 0; i < sources; ++i) {
- if (src[i].file != GRF)
+ if (src[i].file != GRF && src[i].file != ATTR)
continue;
if (this->exec_size <= 1)
@@ -97,6 +97,7 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const
fs_reg &dst,
break;
case GRF:
case HW_REG:
+ case ATTR:
assert(this->src[i].width > 0);
if (this->src[i].width == 1) {
this->src[i].effective_width = this->exec_size;
@@ -121,6 +122,7 @@ fs_inst::init(enum opcode opcode, uint8_t exec_size, const
fs_reg &dst,
case GRF:
case HW_REG:
case MRF:
+ case ATTR:
this->regs_written = (dst.width * dst.stride * type_sz(dst.type) + 31) /
32;
break;
case BAD_FILE:
@@ -636,7 +638,7 @@ fs_reg::is_contiguous() const
bool
fs_reg::is_valid_3src() const
{
- return file == GRF || file == UNIFORM;
+ return file == GRF || file == UNIFORM || file == ATTR;
}
int
@@ -3148,6 +3150,9 @@ fs_visitor::dump_instruction(backend_instruction
*be_inst, FILE *file)
case UNIFORM:
fprintf(file, "***u%d***", inst->dst.reg + inst->dst.reg_offset);
break;
+ case ATTR:
+ fprintf(file, "attr%d", inst->dst.reg + inst->dst.reg_offset);
+ break;
case HW_REG:
if (inst->dst.fixed_hw_reg.file == BRW_ARCHITECTURE_REGISTER_FILE) {
switch (inst->dst.fixed_hw_reg.nr) {
@@ -3199,6 +3204,9 @@ fs_visitor::dump_instruction(backend_instruction
*be_inst, FILE *file)
case MRF:
fprintf(file, "***m%d***", inst->src[i].reg);
break;
+ case ATTR:
+ fprintf(file, "attr%d", inst->src[i].reg + inst->src[i].reg_offset);
+ break;
case UNIFORM:
fprintf(file, "u%d", inst->src[i].reg + inst->src[i].reg_offset);
if (inst->src[i].reladdr) {
diff --git a/src/mesa/drivers/dri/i965/brw_fs.h
b/src/mesa/drivers/dri/i965/brw_fs.h
index 457fb4b..454496e 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.h
+++ b/src/mesa/drivers/dri/i965/brw_fs.h
@@ -132,6 +132,7 @@ byte_offset(fs_reg reg, unsigned delta)
case BAD_FILE:
break;
case GRF:
+ case ATTR:
reg.reg_offset += delta / 32;
break;
case MRF:
@@ -157,6 +158,7 @@ horiz_offset(fs_reg reg, unsigned delta)
break;
case GRF:
case MRF:
+ case ATTR:
return byte_offset(reg, delta * reg.stride * type_sz(reg.type));
default:
assert(delta == 0);
@@ -173,6 +175,7 @@ offset(fs_reg reg, unsigned delta)
break;
case GRF:
case MRF:
+ case ATTR:
return byte_offset(reg, delta * reg.width * reg.stride *
type_sz(reg.type));
case UNIFORM:
reg.reg_offset += delta;
diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
index 75ee2c7..dee79d3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
@@ -1270,8 +1270,6 @@ brw_reg_from_fs_reg(fs_reg *reg)
/* Probably unused. */
brw_reg = brw_null_reg();
break;
- case UNIFORM:
- unreachable("not reached");
default:
unreachable("not reached");
}
diff --git a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
index f36c474..0cc51f3 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_visitor.cpp
@@ -196,8 +196,15 @@ fs_visitor::visit(ir_dereference_array *ir)
src.type = brw_type_for_base_type(ir->type);
if (constant_index) {
- assert(src.file == UNIFORM || src.file == GRF || src.file == HW_REG);
- src = offset(src, constant_index->value.i[0] * element_size);
+ if (src.file == ATTR) {
+ /* Attribute arrays get loaded as one vec4 per element. In that case
+ * offset the source register.
+ */
+ src.reg += constant_index->value.i[0];
+ } else {
+ assert(src.file == UNIFORM || src.file == GRF || src.file == HW_REG);
+ src = offset(src, constant_index->value.i[0] * element_size);
+ }
} else {
/* Variable index array dereference. We attach the variable index
* component to the reg as a pointer to a register containing the
--
2.1.0
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