On Tuesday, November 11, 2014 02:39:13 PM Matt Turner wrote:
> On Tue, Nov 11, 2014 at 2:17 PM, Matt Turner <matts...@gmail.com> wrote:
> > On Sat, Nov 8, 2014 at 10:18 PM, Kenneth Graunke <kenn...@whitecape.org>
wrote:
> >> On Monday, November 03, 2014 01:34:49 PM Matt Turner wrote:
> >>> +static bool
> >>> +can_do_writemask(const struct brw_context *brw,
> >>> + const vec4_instruction *inst)
> >>> +{
> >>> + switch (inst->opcode) {
> >>> + case SHADER_OPCODE_GEN4_SCRATCH_READ:
> >>> + case VS_OPCODE_PULL_CONSTANT_LOAD:
> >>> + case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7:
> >>> + return false;
> >>> + default:
> >>> + /* The MATH instruction on Gen6 only executes in align1 mode,
which does
> >>> + * not support writemasking.
> >>> + */
> >>> + if (brw->gen == 6 && inst->is_math())
> >>> + return false;
> >>> +
> >>> + if (inst->is_tex())
> >>> + return false;
> >>
> >> I'd feel a lot more confident in this function if it were:
> >>
> >> {
> >> /* The MATH instruction on Gen6 only executes in align1 mode, which
does
> >> * not support writemasking.
> >> */
> >> if (brw->gen == 6 && inst->is_math())
> >> return false;
> >>
> >> return inst->mlen == 0;
> >> }
> >
> > I like that too, but I noticed that VS_OPCODE_PULL_CONSTANT_LOAD_GEN7
> > doesn't set mlen. I guess that's just a bug?
>
> Looks like it's not. mlen seems to imply some MRF writes, according to
> ::implied_mrf_writes().
>
> I think I'll settle for adding
>
> if (inst->opcode == VS_OPCODE_PULL_CONSTANT_LOAD_GEN7)
> return false;
>
> to the function.This would do the trick: return inst->mlen == 0 && !inst->is_send_from_grf(); and has the benefit of fewer places to update if we add more send-from-GRF opcodes.
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