On Monday, November 10, 2014 02:57:22 PM Neil Roberts wrote: > I'm not really sure if I understand your reply correctly. Did you see > that I also posted the corresponding kernel patch? I was testing my > patch on top of the drm-intel-next branch with IvyBridge.
That's why. Ivybridge has had the hardware checker disabled for a long time (basically, enabling PPGTT disables it), so you could write any registers you want. Haswell allows PPGTT + the hardware checker, so the kernel does that, and your register writes git turned into MI_NOOP. drm-intel-next must have the new software checker turned on, which disallows non-whitelisted register writes (along with libva, so it can't really be enabled upstream yet). --Ken
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