The optimization relies on CMP setting the destination to 0, which is
equivalent to 0.0f.  However, early platforms only set the least
significant byte, leaving the other bits undefined.  So, we must disable
the optimization on those platforms.

Oddly, Sandybridge wasn't reported as broken, even though it's
documented to only set the LSB.  It's unclear whether it follows ILK on
IVB behavior.

+32 piglits on Ironlake.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?=79963
Signed-off-by: Kenneth Graunke <kenn...@whitecape.org>
---
 src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp 
b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
index f22d38d..33cb9a9 100644
--- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
+++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp
@@ -1135,6 +1135,13 @@ vec4_visitor::try_emit_mad(ir_expression *ir)
 bool
 vec4_visitor::try_emit_b2f_of_compare(ir_expression *ir)
 {
+   /* This optimization relies on CMP setting the destination to 0 when
+    * false.  Early hardware only sets the least significant bit, and
+    * leaves the other bits undefined.  So we can't use it.
+    */
+   if (brw->gen < 7)
+      return false;
+
    ir_expression *const cmp = ir->operands[0]->as_expression();
 
    if (cmp == NULL)
-- 
1.9.2

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