> + if (align16) {
> + /* Emulate the Gen7 zeroing bug (see comments in vec4_visitor's
> + * emit_pack_half_2x16 method.)
> + */
> + brw_MOV(p, retype(dst, BRW_REGISTER_TYPE_UD), brw_imm_ud(0u));
> + }
> + return brw_MOV(p, retype(dst, BRW_REGISTER_TYPE_HF), src);
> + } else {
> + assert(brw->gen >= 7);
This can be == 7.
> + return brw_alu1(p, BRW_OPCODE_F32TO16, dst, src);
> + }
> +}
> +
> +brw_inst *
> +brw_F16TO32(struct brw_compile *p, struct brw_reg dst, struct brw_reg src)
> +{
> + const struct brw_context *brw = p->brw;
> + assert(src.type == BRW_REGISTER_TYPE_W ||
> + src.type == BRW_REGISTER_TYPE_UW ||
> + src.type == BRW_REGISTER_TYPE_HF);
> +
> + if (brw->gen >= 8) {
> + return brw_MOV(p, dst, retype(src, BRW_REGISTER_TYPE_HF));
> + } else {
> + assert(brw->gen >= 7);
Same here
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